1# SPDX-License-Identifier: GPL-2.0 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/pwm/allwinner,sun4i-a10-pwm.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Allwinner A10 PWM Device Tree Bindings 8 9maintainers: 10 - Chen-Yu Tsai <wens@csie.org> 11 - Maxime Ripard <mripard@kernel.org> 12 13properties: 14 "#pwm-cells": 15 const: 3 16 17 compatible: 18 oneOf: 19 - const: allwinner,sun4i-a10-pwm 20 - const: allwinner,sun5i-a10s-pwm 21 - const: allwinner,sun5i-a13-pwm 22 - const: allwinner,sun7i-a20-pwm 23 - const: allwinner,sun8i-h3-pwm 24 - items: 25 - const: allwinner,sun8i-a83t-pwm 26 - const: allwinner,sun8i-h3-pwm 27 - items: 28 - const: allwinner,sun8i-v3s-pwm 29 - const: allwinner,sun7i-a20-pwm 30 - items: 31 - const: allwinner,sun50i-a64-pwm 32 - const: allwinner,sun5i-a13-pwm 33 - items: 34 - const: allwinner,sun50i-h5-pwm 35 - const: allwinner,sun5i-a13-pwm 36 - const: allwinner,sun50i-h6-pwm 37 38 reg: 39 maxItems: 1 40 41 clocks: 42 minItems: 1 43 maxItems: 2 44 items: 45 - description: Module Clock 46 - description: Bus Clock 47 48 # Even though it only applies to subschemas under the conditionals, 49 # not listing them here will trigger a warning because of the 50 # additionalsProperties set to false. 51 clock-names: true 52 53 resets: 54 maxItems: 1 55 56if: 57 properties: 58 compatible: 59 contains: 60 const: allwinner,sun50i-h6-pwm 61 62then: 63 properties: 64 clocks: 65 maxItems: 2 66 67 clock-names: 68 items: 69 - const: mod 70 - const: bus 71 72 required: 73 - clock-names 74 - resets 75 76else: 77 properties: 78 clocks: 79 maxItems: 1 80 81required: 82 - "#pwm-cells" 83 - compatible 84 - reg 85 - clocks 86 87additionalProperties: false 88 89examples: 90 - | 91 pwm: pwm@1c20e00 { 92 compatible = "allwinner,sun7i-a20-pwm"; 93 reg = <0x01c20e00 0xc>; 94 clocks = <&osc24M>; 95 #pwm-cells = <3>; 96 }; 97 98 - | 99 #include <dt-bindings/clock/sun50i-h6-ccu.h> 100 #include <dt-bindings/reset/sun50i-h6-ccu.h> 101 102 pwm@300a000 { 103 compatible = "allwinner,sun50i-h6-pwm"; 104 reg = <0x0300a000 0x400>; 105 clocks = <&osc24M>, <&ccu CLK_BUS_PWM>; 106 clock-names = "mod", "bus"; 107 resets = <&ccu RST_BUS_PWM>; 108 #pwm-cells = <3>; 109 }; 110 111... 112