1Freescale Peripheral Management Access Unit (PAMU) Device Tree Binding
2
3DESCRIPTION
4
5The PAMU is an I/O MMU that provides device-to-memory access control and
6address translation capabilities.
7
8Required properties:
9
10- compatible	: <string>
11		  First entry is a version-specific string, such as
12		  "fsl,pamu-v1.0".  The second is "fsl,pamu".
13- ranges	: <prop-encoded-array>
14		  A standard property. Utilized to describe the memory mapped
15		  I/O space utilized by the controller.  The size should
16		  be set to the total size of the register space of all
17		  physically present PAMU controllers.  For example, for
18		  PAMU v1.0, on an SOC that has five PAMU devices, the size
19		  is 0x5000.
20- interrupts	: <prop-encoded-array>
21		  Interrupt mappings.  The first tuple is the normal PAMU
22		  interrupt, used for reporting access violations.  The second
23		  is for PAMU hardware errors, such as PAMU operation errors
24		  and ECC errors.
25- #address-cells: <u32>
26		  A standard property.
27- #size-cells	: <u32>
28		  A standard property.
29
30Optional properties:
31- reg		: <prop-encoded-array>
32		  A standard property.   It represents the CCSR registers of
33		  all child PAMUs combined.  Include it to provide support
34		  for legacy drivers.
35- interrupt-parent : <phandle>
36		  Phandle to interrupt controller
37
38Child nodes:
39
40Each child node represents one PAMU controller.  Each SOC device that is
41connected to a specific PAMU device should have a "fsl,pamu-phandle" property
42that links to the corresponding specific child PAMU controller.
43
44- reg		: <prop-encoded-array>
45		  A standard property.  Specifies the physical address and
46		  length (relative to the parent 'ranges' property) of this
47		  PAMU controller's configuration registers.  The size should
48		  be set to the size of this PAMU controllers's register space.
49		  For PAMU v1.0, this size is 0x1000.
50- fsl,primary-cache-geometry
51		: <prop-encoded-array>
52		  Two cells that specify the geometry of the primary PAMU
53		  cache.  The first is the number of cache lines, and the
54		  second is the number of "ways".  For direct-mapped caches,
55		  specify a value of 1.
56- fsl,secondary-cache-geometry
57		: <prop-encoded-array>
58		  Two cells that specify the geometry of the secondary PAMU
59		  cache.  The first is the number of cache lines, and the
60		  second is the number of "ways".  For direct-mapped caches,
61		  specify a value of 1.
62
63Device nodes:
64
65Devices that have LIODNs need to specify links to the parent PAMU controller
66(the actual PAMU controller that this device is connected to) and a pointer to
67the LIODN register, if applicable.
68
69- fsl,iommu-parent
70		: <phandle>
71		Phandle to the single, specific PAMU controller node to which
72		this device is connect.  The PAMU topology is represented in
73		the device tree to assist code that dynamically determines the
74		best LIODN values to minimize PAMU cache thrashing.
75
76- fsl,liodn-reg : <prop-encoded-array>
77		  Two cells that specify the location of the LIODN register
78		  for this device.  Required for devices that have a single
79		  LIODN.  The first cell is a phandle to a node that contains
80		  the registers where the LIODN is to be set.  The second is
81		  the offset from the first "reg" resource of the node where
82		  the specific LIODN register is located.
83
84
85Example:
86
87	iommu@20000 {
88		compatible = "fsl,pamu-v1.0", "fsl,pamu";
89		reg = <0x20000 0x5000>;
90		ranges = <0 0x20000 0x5000>;
91		#address-cells = <1>;
92		#size-cells = <1>;
93		interrupts = <
94			24 2 0 0
95			16 2 1 30>;
96
97		pamu0: pamu@0 {
98			reg = <0 0x1000>;
99			fsl,primary-cache-geometry = <32 1>;
100			fsl,secondary-cache-geometry = <128 2>;
101		};
102
103		pamu1: pamu@1000 {
104			reg = <0x1000 0x1000>;
105			fsl,primary-cache-geometry = <32 1>;
106			fsl,secondary-cache-geometry = <128 2>;
107		};
108
109		pamu2: pamu@2000 {
110			reg = <0x2000 0x1000>;
111			fsl,primary-cache-geometry = <32 1>;
112			fsl,secondary-cache-geometry = <128 2>;
113		};
114
115		pamu3: pamu@3000 {
116			reg = <0x3000 0x1000>;
117			fsl,primary-cache-geometry = <32 1>;
118			fsl,secondary-cache-geometry = <128 2>;
119		};
120
121		pamu4: pamu@4000 {
122			reg = <0x4000 0x1000>;
123			fsl,primary-cache-geometry = <32 1>;
124			fsl,secondary-cache-geometry = <128 2>;
125		};
126	};
127
128	guts: global-utilities@e0000 {
129		compatible = "fsl,qoriq-device-config-1.0";
130		reg = <0xe0000 0xe00>;
131		fsl,has-rstcr;
132		#sleep-cells = <1>;
133		fsl,liodn-bits = <12>;
134	};
135
136/include/ "qoriq-dma-0.dtsi"
137	dma@100300 {
138		fsl,iommu-parent = <&pamu0>;
139		fsl,liodn-reg = <&guts 0x584>; /* DMA2LIODNR */
140	};
141