1180076cbSScott Wood* Freescale MPIC timers 2180076cbSScott Wood 3180076cbSScott WoodRequired properties: 4180076cbSScott Wood- compatible: "fsl,mpic-global-timer" 5180076cbSScott Wood 6180076cbSScott Wood- reg : Contains two regions. The first is the main timer register bank 7180076cbSScott Wood (GTCCRxx, GTBCRxx, GTVPRxx, GTDRxx). The second is the timer control 8180076cbSScott Wood register (TCRx) for the group. 9180076cbSScott Wood 10180076cbSScott Wood- fsl,available-ranges: use <start count> style section to define which 11180076cbSScott Wood timer interrupts can be used. This property is optional; without this, 12180076cbSScott Wood all timers within the group can be used. 13180076cbSScott Wood 14180076cbSScott Wood- interrupts: one interrupt per timer in the group, in order, starting 15180076cbSScott Wood with timer zero. If timer-available-ranges is present, only the 16180076cbSScott Wood interrupts that correspond to available timers shall be present. 17180076cbSScott Wood 18180076cbSScott WoodExample: 19180076cbSScott Wood /* Note that this requires #interrupt-cells to be 4 */ 20180076cbSScott Wood timer0: timer@41100 { 21180076cbSScott Wood compatible = "fsl,mpic-global-timer"; 22180076cbSScott Wood reg = <0x41100 0x100 0x41300 4>; 23180076cbSScott Wood 24180076cbSScott Wood /* Another AMP partition is using timers 0 and 1 */ 25180076cbSScott Wood fsl,available-ranges = <2 2>; 26180076cbSScott Wood 27180076cbSScott Wood interrupts = <2 0 3 0 28180076cbSScott Wood 3 0 3 0>; 29180076cbSScott Wood }; 30180076cbSScott Wood 31180076cbSScott Wood timer1: timer@42100 { 32180076cbSScott Wood compatible = "fsl,mpic-global-timer"; 33180076cbSScott Wood reg = <0x42100 0x100 0x42300 4>; 34180076cbSScott Wood interrupts = <4 0 3 0 35180076cbSScott Wood 5 0 3 0 36180076cbSScott Wood 6 0 3 0 37180076cbSScott Wood 7 0 3 0>; 38180076cbSScott Wood }; 39