1d524dac9SGrant LikelyMPC5121 PSC Device Tree Bindings 2d524dac9SGrant Likely 3d524dac9SGrant LikelyPSC in UART mode 4d524dac9SGrant Likely---------------- 5d524dac9SGrant Likely 6d524dac9SGrant LikelyFor PSC in UART mode the needed PSC serial devices 7d524dac9SGrant Likelyare specified by fsl,mpc5121-psc-uart nodes in the 8d524dac9SGrant Likelyfsl,mpc5121-immr SoC node. Additionally the PSC FIFO 954e7ad47SUwe Kleine-KönigController node fsl,mpc5121-psc-fifo is required there: 10d524dac9SGrant Likely 1154e7ad47SUwe Kleine-Königfsl,mpc512x-psc-uart nodes 12d524dac9SGrant Likely-------------------------- 13d524dac9SGrant Likely 14d524dac9SGrant LikelyRequired properties : 1554e7ad47SUwe Kleine-König - compatible : Should contain "fsl,<soc>-psc-uart" and "fsl,<soc>-psc" 1654e7ad47SUwe Kleine-König Supported <soc>s: mpc5121, mpc5125 17d524dac9SGrant Likely - reg : Offset and length of the register set for the PSC device 18d524dac9SGrant Likely - interrupts : <a b> where a is the interrupt number of the 19d524dac9SGrant Likely PSC FIFO Controller and b is a field that represents an 20d524dac9SGrant Likely encoding of the sense and level information for the interrupt. 21d524dac9SGrant Likely - interrupt-parent : the phandle for the interrupt controller that 22d524dac9SGrant Likely services interrupts for this device. 23d524dac9SGrant Likely 24d524dac9SGrant LikelyRecommended properties : 25d524dac9SGrant Likely - fsl,rx-fifo-size : the size of the RX fifo slice (a multiple of 4) 26d524dac9SGrant Likely - fsl,tx-fifo-size : the size of the TX fifo slice (a multiple of 4) 27d524dac9SGrant Likely 2854e7ad47SUwe Kleine-KönigPSC in SPI mode 2954e7ad47SUwe Kleine-König--------------- 30d524dac9SGrant Likely 3154e7ad47SUwe Kleine-KönigSimilar to the UART mode a PSC can be operated in SPI mode. The compatible used 3254e7ad47SUwe Kleine-Königfor that is fsl,mpc5121-psc-spi. It requires a fsl,mpc5121-psc-fifo as well. 3354e7ad47SUwe Kleine-KönigThe required and recommended properties are identical to the 3454e7ad47SUwe Kleine-Königfsl,mpc5121-psc-uart nodes, just use spi instead of uart in the compatible 3554e7ad47SUwe Kleine-Königstring. 3654e7ad47SUwe Kleine-König 3754e7ad47SUwe Kleine-Königfsl,mpc512x-psc-fifo node 38d524dac9SGrant Likely------------------------- 39d524dac9SGrant Likely 40d524dac9SGrant LikelyRequired properties : 4154e7ad47SUwe Kleine-König - compatible : Should be "fsl,<soc>-psc-fifo" 4254e7ad47SUwe Kleine-König Supported <soc>s: mpc5121, mpc5125 43d524dac9SGrant Likely - reg : Offset and length of the register set for the PSC 44d524dac9SGrant Likely FIFO Controller 45d524dac9SGrant Likely - interrupts : <a b> where a is the interrupt number of the 46d524dac9SGrant Likely PSC FIFO Controller and b is a field that represents an 47d524dac9SGrant Likely encoding of the sense and level information for the interrupt. 48d524dac9SGrant Likely - interrupt-parent : the phandle for the interrupt controller that 49d524dac9SGrant Likely services interrupts for this device. 50d524dac9SGrant Likely 5154e7ad47SUwe Kleine-KönigRecommended properties : 5254e7ad47SUwe Kleine-König - clocks : specifies the clock needed to operate the fifo controller 5354e7ad47SUwe Kleine-König - clock-names : name(s) for the clock(s) listed in clocks 54d524dac9SGrant Likely 55d524dac9SGrant LikelyExample for a board using PSC0 and PSC1 devices in serial mode: 56d524dac9SGrant Likely 57d524dac9SGrant Likelyserial@11000 { 58d524dac9SGrant Likely compatible = "fsl,mpc5121-psc-uart", "fsl,mpc5121-psc"; 59d524dac9SGrant Likely cell-index = <0>; 60d524dac9SGrant Likely reg = <0x11000 0x100>; 61d524dac9SGrant Likely interrupts = <40 0x8>; 62d524dac9SGrant Likely interrupt-parent = < &ipic >; 63d524dac9SGrant Likely fsl,rx-fifo-size = <16>; 64d524dac9SGrant Likely fsl,tx-fifo-size = <16>; 65d524dac9SGrant Likely}; 66d524dac9SGrant Likely 67d524dac9SGrant Likelyserial@11100 { 68d524dac9SGrant Likely compatible = "fsl,mpc5121-psc-uart", "fsl,mpc5121-psc"; 69d524dac9SGrant Likely cell-index = <1>; 70d524dac9SGrant Likely reg = <0x11100 0x100>; 71d524dac9SGrant Likely interrupts = <40 0x8>; 72d524dac9SGrant Likely interrupt-parent = < &ipic >; 73d524dac9SGrant Likely fsl,rx-fifo-size = <16>; 74d524dac9SGrant Likely fsl,tx-fifo-size = <16>; 75d524dac9SGrant Likely}; 76d524dac9SGrant Likely 77d524dac9SGrant Likelypscfifo@11f00 { 78d524dac9SGrant Likely compatible = "fsl,mpc5121-psc-fifo"; 79d524dac9SGrant Likely reg = <0x11f00 0x100>; 80d524dac9SGrant Likely interrupts = <40 0x8>; 81d524dac9SGrant Likely interrupt-parent = < &ipic >; 82d524dac9SGrant Likely}; 83