1Microsemi Ocelot reset controller
2
3The DEVCPU_GCB:CHIP_REGS have a SOFT_RST register that can be used to reset the
4SoC MIPS core.
5
6Required Properties:
7 - compatible: "mscc,ocelot-chip-reset"
8
9Example:
10	reset@1070008 {
11		compatible = "mscc,ocelot-chip-reset";
12		reg = <0x1070008 0x4>;
13	};
14
15