1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/power/fsl,imx-gpcv2.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Freescale i.MX General Power Controller v2 8 9maintainers: 10 - Andrey Smirnov <andrew.smirnov@gmail.com> 11 12description: | 13 The i.MX7S/D General Power Control (GPC) block contains Power Gating 14 Control (PGC) for various power domains. 15 16 Power domains contained within GPC node are generic power domain 17 providers, documented in 18 Documentation/devicetree/bindings/power/power-domain.yaml, which are 19 described as subnodes of the power gating controller 'pgc' node. 20 21 IP cores belonging to a power domain should contain a 'power-domains' 22 property that is a phandle for PGC node representing the domain. 23 24properties: 25 compatible: 26 enum: 27 - fsl,imx7d-gpc 28 - fsl,imx8mn-gpc 29 - fsl,imx8mq-gpc 30 - fsl,imx8mm-gpc 31 32 reg: 33 maxItems: 1 34 35 interrupts: 36 maxItems: 1 37 38 interrupt-controller: true 39 '#interrupt-cells': 40 const: 3 41 42 pgc: 43 type: object 44 description: list of power domains provided by this controller. 45 46 patternProperties: 47 "power-domain@[0-9]$": 48 type: object 49 properties: 50 51 '#power-domain-cells': 52 const: 0 53 54 reg: 55 description: | 56 Power domain index. Valid values are defined in 57 include/dt-bindings/power/imx7-power.h for fsl,imx7d-gpc and 58 include/dt-bindings/power/imx8m-power.h for fsl,imx8mq-gpc 59 include/dt-bindings/power/imx8mm-power.h for fsl,imx8mm-gpc 60 maxItems: 1 61 62 clocks: 63 description: | 64 A number of phandles to clocks that need to be enabled during domain 65 power-up sequencing to ensure reset propagation into devices located 66 inside this power domain. 67 minItems: 1 68 maxItems: 5 69 70 power-supply: true 71 72 resets: 73 description: | 74 A number of phandles to resets that need to be asserted during 75 power-up sequencing of the domain. The resets belong to devices 76 located inside the power domain, which need to be held in reset 77 across the power-up sequence. So no means to specify what each 78 reset is in a generic power-domain binding. 79 minItems: 1 80 maxItems: 4 81 82 required: 83 - '#power-domain-cells' 84 - reg 85 86required: 87 - compatible 88 - reg 89 - interrupts 90 - pgc 91 92additionalProperties: false 93 94examples: 95 - | 96 #include <dt-bindings/interrupt-controller/arm-gic.h> 97 98 gpc@303a0000 { 99 compatible = "fsl,imx7d-gpc"; 100 reg = <0x303a0000 0x1000>; 101 interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>; 102 103 pgc { 104 #address-cells = <1>; 105 #size-cells = <0>; 106 107 pgc_mipi_phy: power-domain@0 { 108 #power-domain-cells = <0>; 109 reg = <0>; 110 power-supply = <®_1p0d>; 111 }; 112 113 pgc_pcie_phy: power-domain@1 { 114 #power-domain-cells = <0>; 115 reg = <1>; 116 power-supply = <®_1p0d>; 117 }; 118 119 pgc_hsic_phy: power-domain@2 { 120 #power-domain-cells = <0>; 121 reg = <2>; 122 power-supply = <®_1p2>; 123 }; 124 }; 125 }; 126