1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/power/fsl,imx-gpc.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Freescale i.MX General Power Controller 8 9maintainers: 10 - Philipp Zabel <p.zabel@pengutronix.de> 11 12description: | 13 The i.MX6 General Power Control (GPC) block contains DVFS load tracking 14 counters and Power Gating Control (PGC). 15 16 The power domains are generic power domain providers as documented in 17 Documentation/devicetree/bindings/power/power-domain.yaml. They are 18 described as subnodes of the power gating controller 'pgc' node of the GPC. 19 20 IP cores belonging to a power domain should contain a 'power-domains' 21 property that is a phandle pointing to the power domain the device belongs 22 to. 23 24properties: 25 compatible: 26 enum: 27 - fsl,imx6q-gpc 28 - fsl,imx6qp-gpc 29 - fsl,imx6sl-gpc 30 - fsl,imx6sx-gpc 31 32 reg: 33 maxItems: 1 34 35 interrupts: 36 maxItems: 1 37 38 clocks: 39 maxItems: 1 40 41 clock-names: 42 const: ipg 43 44 pgc: 45 type: object 46 description: list of power domains provided by this controller. 47 48 patternProperties: 49 "power-domain@[0-9]$": 50 type: object 51 properties: 52 53 '#power-domain-cells': 54 const: 0 55 56 reg: 57 description: | 58 The following DOMAIN_INDEX values are valid for i.MX6Q: 59 ARM_DOMAIN 0 60 PU_DOMAIN 1 61 The following additional DOMAIN_INDEX value is valid for i.MX6SL: 62 DISPLAY_DOMAIN 2 63 The following additional DOMAIN_INDEX value is valid for i.MX6SX: 64 PCI_DOMAIN 3 65 maxItems: 1 66 67 clocks: 68 description: | 69 A number of phandles to clocks that need to be enabled during domain 70 power-up sequencing to ensure reset propagation into devices located 71 inside this power domain. 72 minItems: 1 73 maxItems: 7 74 75 power-supply: true 76 77 required: 78 - '#power-domain-cells' 79 - reg 80 81required: 82 - compatible 83 - reg 84 - interrupts 85 - clocks 86 - clock-names 87 - pgc 88 89additionalProperties: false 90 91examples: 92 - | 93 #include <dt-bindings/clock/imx6qdl-clock.h> 94 #include <dt-bindings/interrupt-controller/arm-gic.h> 95 96 gpc@20dc000 { 97 compatible = "fsl,imx6q-gpc"; 98 reg = <0x020dc000 0x4000>; 99 interrupts = <0 89 IRQ_TYPE_LEVEL_HIGH>; 100 clocks = <&clks IMX6QDL_CLK_IPG>; 101 clock-names = "ipg"; 102 103 pgc { 104 #address-cells = <1>; 105 #size-cells = <0>; 106 107 power-domain@0 { 108 reg = <0>; 109 #power-domain-cells = <0>; 110 }; 111 112 pd_pu: power-domain@1 { 113 reg = <1>; 114 #power-domain-cells = <0>; 115 power-supply = <®_pu>; 116 clocks = <&clks IMX6QDL_CLK_GPU3D_CORE>, 117 <&clks IMX6QDL_CLK_GPU3D_SHADER>, 118 <&clks IMX6QDL_CLK_GPU2D_CORE>, 119 <&clks IMX6QDL_CLK_GPU2D_AXI>, 120 <&clks IMX6QDL_CLK_OPENVG_AXI>, 121 <&clks IMX6QDL_CLK_VPU_AXI>; 122 }; 123 }; 124 }; 125