11825c1feSNobuhiro Iwamatsu# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
21825c1feSNobuhiro Iwamatsu%YAML 1.2
31825c1feSNobuhiro Iwamatsu---
41825c1feSNobuhiro Iwamatsu$id: http://devicetree.org/schemas/pinctrl/toshiba,visconti-pinctrl.yaml#
51825c1feSNobuhiro Iwamatsu$schema: http://devicetree.org/meta-schemas/core.yaml#
61825c1feSNobuhiro Iwamatsu
71825c1feSNobuhiro Iwamatsutitle: Toshiba Visconti TMPV770x pin mux/config controller
81825c1feSNobuhiro Iwamatsu
91825c1feSNobuhiro Iwamatsumaintainers:
101825c1feSNobuhiro Iwamatsu  - Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>
111825c1feSNobuhiro Iwamatsu
121825c1feSNobuhiro Iwamatsudescription:
131825c1feSNobuhiro Iwamatsu  Toshiba's Visconti ARM SoC a pin mux/config controller.
141825c1feSNobuhiro Iwamatsu
151825c1feSNobuhiro Iwamatsuproperties:
161825c1feSNobuhiro Iwamatsu  compatible:
171825c1feSNobuhiro Iwamatsu    enum:
181825c1feSNobuhiro Iwamatsu      - toshiba,tmpv7708-pinctrl
191825c1feSNobuhiro Iwamatsu
201825c1feSNobuhiro Iwamatsu  reg:
211825c1feSNobuhiro Iwamatsu    maxItems: 1
221825c1feSNobuhiro Iwamatsu
23c09acbc4SRafał MiłeckiallOf:
24*49cd1dd1SRob Herring  - $ref: pinctrl.yaml#
25c09acbc4SRafał Miłecki
261825c1feSNobuhiro Iwamatsurequired:
271825c1feSNobuhiro Iwamatsu  - compatible
281825c1feSNobuhiro Iwamatsu  - reg
291825c1feSNobuhiro Iwamatsu
301825c1feSNobuhiro IwamatsupatternProperties:
311825c1feSNobuhiro Iwamatsu  '-pins$':
321825c1feSNobuhiro Iwamatsu    type: object
331825c1feSNobuhiro Iwamatsu    description: |
341825c1feSNobuhiro Iwamatsu      A pinctrl node should contain at least one subnodes representing the
351825c1feSNobuhiro Iwamatsu      pinctrl groups available on the machine. Each subnode will list the
361825c1feSNobuhiro Iwamatsu      pins it needs, and how they should be configured, with regard to muxer
371825c1feSNobuhiro Iwamatsu      configuration, pullups, drive strength.
38*49cd1dd1SRob Herring    $ref: pinmux-node.yaml
399194e0f8SRob Herring    additionalProperties: false
401825c1feSNobuhiro Iwamatsu
411825c1feSNobuhiro Iwamatsu    properties:
421825c1feSNobuhiro Iwamatsu      function:
431825c1feSNobuhiro Iwamatsu        description:
441825c1feSNobuhiro Iwamatsu          Function to mux.
45*49cd1dd1SRob Herring        $ref: /schemas/types.yaml#/definitions/string
461825c1feSNobuhiro Iwamatsu        enum: [i2c0, i2c1, i2c2, i2c3, i2c4, i2c5, i2c6, i2c7, i2c8,
471825c1feSNobuhiro Iwamatsu               spi0, spi1, spi2, spi3, spi4, spi5, spi6,
481825c1feSNobuhiro Iwamatsu               uart0, uart1, uart2, uart3, pwm, pcmif_out, pcmif_in]
491825c1feSNobuhiro Iwamatsu
501825c1feSNobuhiro Iwamatsu      groups:
511825c1feSNobuhiro Iwamatsu        description:
521825c1feSNobuhiro Iwamatsu          Name of the pin group to use for the functions.
53*49cd1dd1SRob Herring        $ref: /schemas/types.yaml#/definitions/string
541825c1feSNobuhiro Iwamatsu        enum: [i2c0_grp, i2c1_grp, i2c2_grp, i2c3_grp, i2c4_grp,
551825c1feSNobuhiro Iwamatsu               i2c5_grp, i2c6_grp, i2c7_grp, i2c8_grp,
561825c1feSNobuhiro Iwamatsu               spi0_grp, spi0_cs0_grp, spi0_cs1_grp, spi0_cs2_grp,
571825c1feSNobuhiro Iwamatsu               spi1_grp, spi2_grp, spi3_grp, spi4_grp, spi5_grp, spi6_grp,
581825c1feSNobuhiro Iwamatsu               uart0_grp, uart1_grp, uart2_grp, uart3_grp,
591825c1feSNobuhiro Iwamatsu               pwm0_gpio4_grp, pwm0_gpio8_grp, pwm0_gpio12_grp,
601825c1feSNobuhiro Iwamatsu               pwm0_gpio16_grp, pwm1_gpio5_grp, pwm1_gpio9_grp,
611825c1feSNobuhiro Iwamatsu               pwm1_gpio13_grp, pwm1_gpio17_grp, pwm2_gpio6_grp,
621825c1feSNobuhiro Iwamatsu               pwm2_gpio10_grp, pwm2_gpio14_grp, pwm2_gpio18_grp,
631825c1feSNobuhiro Iwamatsu               pwm3_gpio7_grp, pwm3_gpio11_grp, pwm3_gpio15_grp,
641825c1feSNobuhiro Iwamatsu               pwm3_gpio19_grp, pcmif_out_grp, pcmif_in_grp]
651825c1feSNobuhiro Iwamatsu
661825c1feSNobuhiro Iwamatsu      drive-strength:
671825c1feSNobuhiro Iwamatsu        enum: [2, 4, 6, 8, 16, 24, 32]
681825c1feSNobuhiro Iwamatsu        default: 2
691825c1feSNobuhiro Iwamatsu        description:
701825c1feSNobuhiro Iwamatsu          Selects the drive strength for the specified pins, in mA.
711825c1feSNobuhiro Iwamatsu
721825c1feSNobuhiro Iwamatsu      bias-pull-up: true
731825c1feSNobuhiro Iwamatsu
741825c1feSNobuhiro Iwamatsu      bias-pull-down: true
751825c1feSNobuhiro Iwamatsu
761825c1feSNobuhiro Iwamatsu      bias-disable: true
771825c1feSNobuhiro Iwamatsu
781825c1feSNobuhiro IwamatsuadditionalProperties: false
791825c1feSNobuhiro Iwamatsu
801825c1feSNobuhiro Iwamatsuexamples:
811825c1feSNobuhiro Iwamatsu  # Pinmux controller node
821825c1feSNobuhiro Iwamatsu  - |
831825c1feSNobuhiro Iwamatsu    soc {
841825c1feSNobuhiro Iwamatsu        #address-cells = <2>;
851825c1feSNobuhiro Iwamatsu        #size-cells = <2>;
861825c1feSNobuhiro Iwamatsu
87c09acbc4SRafał Miłecki        pmux: pinmux@24190000 {
881825c1feSNobuhiro Iwamatsu            compatible = "toshiba,tmpv7708-pinctrl";
891825c1feSNobuhiro Iwamatsu            reg = <0 0x24190000 0 0x10000>;
901825c1feSNobuhiro Iwamatsu
911825c1feSNobuhiro Iwamatsu            spi0_pins: spi0-pins {
921825c1feSNobuhiro Iwamatsu                function = "spi0";
931825c1feSNobuhiro Iwamatsu                groups = "spi0_grp";
941825c1feSNobuhiro Iwamatsu            };
951825c1feSNobuhiro Iwamatsu        };
961825c1feSNobuhiro Iwamatsu    };
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