1ST Ericsson abx500 pinmux controller
2
3Required properties:
4- compatible: "stericsson,ab8500-gpio",  "stericsson,ab8540-gpio",
5	      "stericsson,ab8505-gpio", "stericsson,ab9540-gpio",
6
7Please refer to pinctrl-bindings.txt in this directory for details of the
8common pinctrl bindings used by client devices, including the meaning of the
9phrase "pin configuration node".
10
11ST Ericsson's pin configuration nodes act as a container for an arbitrary number of
12subnodes. Each of these subnodes represents some desired configuration for a
13pin, a group, or a list of pins or groups. This configuration can include the
14mux function to select on those pin(s)/group(s), and various pin configuration
15parameters, such as input, output, pull up, pull down...
16
17The name of each subnode is not important; all subnodes should be enumerated
18and processed purely based on their content.
19
20Required subnode-properties:
21- ste,pins : An array of strings. Each string contains the name of a pin or
22    group.
23
24Optional subnode-properties:
25- ste,function: A string containing the name of the function to mux to the
26  pin or group.
27
28- generic pin configuration option to use. Example :
29
30	default_cfg {
31		ste,pins = "GPIO1";
32		bias-disable;
33	};
34
35- ste,config: Handle of pin configuration node containing the generic
36  pinconfig options to use, as described in pinctrl-bindings.txt in
37  this directory. Example :
38
39	pcfg_bias_disable: pcfg_bias_disable {
40		bias-disable;
41	};
42
43	default_cfg {
44		ste,pins = "GPIO1";
45		ste.config = <&pcfg_bias_disable>;
46	};
47
48Example board file extract:
49
50&pinctrl_abx500 {
51	pinctrl-names = "default";
52	pinctrl-0 = <&sysclkreq2_default_mode>, <&sysclkreq3_default_mode>, <&gpio3_default_mode>, <&sysclkreq6_default_mode>, <&pwmout1_default_mode>, <&pwmout2_default_mode>, <&pwmout3_default_mode>, <&adi1_default_mode>, <&dmic12_default_mode>, <&dmic34_default_mode>, <&dmic56_default_mode>, <&sysclkreq5_default_mode>, <&batremn_default_mode>, <&service_default_mode>, <&pwrctrl0_default_mode>, <&pwrctrl1_default_mode>, <&pwmextvibra1_default_mode>, <&pwmextvibra2_default_mode>, <&gpio51_default_mode>, <&gpio52_default_mode>, <&gpio53_default_mode>, <&gpio54_default_mode>, <&pdmclkdat_default_mode>;
53
54	sysclkreq2 {
55		sysclkreq2_default_mode: sysclkreq2_default {
56			default_mux {
57				ste,function = "sysclkreq";
58				ste,pins = "sysclkreq2_d_1";
59			};
60			default_cfg {
61				ste,pins = "GPIO1";
62				bias-disable;
63			};
64		};
65	};
66	sysclkreq3 {
67		sysclkreq3_default_mode: sysclkreq3_default {
68			default_mux {
69				ste,function = "sysclkreq";
70				ste,pins = "sysclkreq3_d_1";
71			};
72			default_cfg {
73				ste,pins = "GPIO2";
74				output-low;
75			};
76		};
77	};
78	gpio3 {
79		gpio3_default_mode: gpio3_default {
80			default_mux {
81				ste,function = "gpio";
82				ste,pins = "gpio3_a_1";
83			};
84			default_cfg {
85				ste,pins = "GPIO3";
86				output-low;
87			};
88		};
89	};
90	sysclkreq6 {
91		sysclkreq6_default_mode: sysclkreq6_default {
92			default_mux {
93				ste,function = "sysclkreq";
94				ste,pins = "sysclkreq6_d_1";
95			};
96			default_cfg {
97				ste,pins = "GPIO4";
98				bias-disable;
99			};
100		};
101	};
102	pwmout1 {
103		pwmout1_default_mode: pwmout1_default {
104			default_mux {
105				ste,function = "pwmout";
106				ste,pins = "pwmout1_d_1";
107			};
108			default_cfg {
109				ste,pins = "GPIO14";
110				output-low;
111			};
112		};
113	};
114	pwmout2 {
115		pwmout2_default_mode: pwmout2_default {
116			pwmout2_default_mux {
117				ste,function = "pwmout";
118				ste,pins = "pwmout2_d_1";
119			};
120			pwmout2_default_cfg {
121				ste,pins = "GPIO15";
122				output-low;
123			};
124		};
125	};
126	pwmout3 {
127		pwmout3_default_mode: pwmout3_default {
128			pwmout3_default_mux {
129				ste,function = "pwmout";
130				ste,pins = "pwmout3_d_1";
131			};
132			pwmout3_default_cfg {
133				ste,pins = "GPIO16";
134				output-low;
135			};
136		};
137	};
138	adi1 {
139
140		adi1_default_mode: adi1_default {
141			adi1_default_mux {
142				ste,function = "adi1";
143				ste,pins = "adi1_d_1";
144			};
145			adi1_default_cfg1 {
146				ste,pins = "GPIO17","GPIO19","GPIO20";
147				bias-disable;
148			};
149			adi1_default_cfg2 {
150				ste,pins = "GPIO18";
151				output-low;
152			};
153		};
154	};
155	dmic12 {
156		dmic12_default_mode: dmic12_default {
157			dmic12_default_mux {
158				ste,function = "dmic";
159				ste,pins = "dmic12_d_1";
160			};
161			dmic12_default_cfg1 {
162				ste,pins = "GPIO27";
163				output-low;
164			};
165			dmic12_default_cfg2 {
166				ste,pins = "GPIO28";
167				bias-disable;
168			};
169		};
170	};
171	dmic34 {
172		dmic34_default_mode: dmic34_default {
173			dmic34_default_mux {
174				ste,function = "dmic";
175				ste,pins = "dmic34_d_1";
176			};
177			dmic34_default_cfg1 {
178				ste,pins = "GPIO29";
179				output-low;
180			};
181			dmic34_default_cfg2 {
182				ste,pins = "GPIO30";
183				bias-disable;{
184
185			};
186		};
187	};
188	dmic56 {
189		dmic56_default_mode: dmic56_default {
190			dmic56_default_mux {
191				ste,function = "dmic";
192				ste,pins = "dmic56_d_1";
193			};
194			dmic56_default_cfg1 {
195				ste,pins = "GPIO31";
196				output-low;
197			};
198			dmic56_default_cfg2 {
199				ste,pins = "GPIO32";
200				bias-disable;
201			};
202		};
203	};
204	sysclkreq5 {
205		sysclkreq5_default_mode: sysclkreq5_default {
206			sysclkreq5_default_mux {
207				ste,function = "sysclkreq";
208				ste,pins = "sysclkreq5_d_1";
209			};
210			sysclkreq5_default_cfg {
211				ste,pins = "GPIO42";
212				output-low;
213			};
214		};
215	};
216	batremn {
217		batremn_default_mode: batremn_default {
218			batremn_default_mux {
219				ste,function = "batremn";
220				ste,pins = "batremn_d_1";
221			};
222			batremn_default_cfg {
223				ste,pins = "GPIO43";
224				bias-disable;
225			};
226		};
227	};
228	service {
229		service_default_mode: service_default {
230			service_default_mux {
231				ste,function = "service";
232				ste,pins = "service_d_1";
233			};
234			service_default_cfg {
235				ste,pins = "GPIO44";
236				bias-disable;
237			};
238		};
239	};
240	pwrctrl0 {
241		pwrctrl0_default_mux: pwrctrl0_mux {
242			pwrctrl0_default_mux {
243				ste,function = "pwrctrl";
244				ste,pins = "pwrctrl0_d_1";
245			};
246		};
247		pwrctrl0_default_mode: pwrctrl0_default {
248			pwrctrl0_default_cfg {
249				ste,pins = "GPIO45";
250				bias-disable;
251			};
252		};
253	};
254	pwrctrl1 {
255		pwrctrl1_default_mux: pwrctrl1_mux {
256			pwrctrl1_default_mux {
257				ste,function = "pwrctrl";
258				ste,pins = "pwrctrl1_d_1";
259			};
260		};
261		pwrctrl1_default_mode: pwrctrl1_default {
262			pwrctrl1_default_cfg {
263				ste,pins = "GPIO46";
264				bias-disable;
265			};
266		};
267	};
268	pwmextvibra1 {
269		pwmextvibra1_default_mode: pwmextvibra1_default {
270			pwmextvibra1_default_mux {
271				ste,function = "pwmextvibra";
272				ste,pins = "pwmextvibra1_d_1";
273			};
274			pwmextvibra1_default_cfg {
275				ste,pins = "GPIO47";
276				bias-disable;
277			};
278		};
279	};
280	pwmextvibra2 {
281		pwmextvibra2_default_mode: pwmextvibra2_default {
282			pwmextvibra2_default_mux {
283				ste,function = "pwmextvibra";
284				ste,pins = "pwmextvibra2_d_1";
285			};
286			pwmextvibra1_default_cfg {
287				ste,pins = "GPIO48";
288				bias-disable;
289			};
290		};
291	};
292	gpio51 {
293		gpio51_default_mode: gpio51_default {
294				gpio51_default_mux {
295				ste,function = "gpio";
296				ste,pins = "gpio51_a_1";
297			};
298			gpio51_default_cfg {
299				ste,pins = "GPIO51";
300				output-low;
301			};
302		};
303	};
304	gpio52 {
305		gpio52_default_mode: gpio52_default {
306			gpio52_default_mux {
307				ste,function = "gpio";
308				ste,pins = "gpio52_a_1";
309			};
310			gpio52_default_cfg {
311				ste,pins = "GPIO52";
312				bias-pull-down;
313			};
314		};
315	};
316	gpio53 {
317		gpio53_default_mode: gpio53_default {
318			gpio53_default_mux {
319				ste,function = "gpio";
320				ste,pins = "gpio53_a_1";
321			};
322			gpio53_default_cfg {
323				ste,pins = "GPIO53";
324				bias-pull-down;
325			};
326		};
327	};
328	gpio54 {
329		gpio54_default_mode: gpio54_default {
330			gpio54_default_mux {
331				ste,function = "gpio";
332				ste,pins = "gpio54_a_1";
333			};
334			gpio54_default_cfg {
335				ste,pins = "GPIO54";
336				output-low;
337			};
338		};
339	};
340	pdmclkdat {
341		pdmclkdat_default_mode: pdmclkdat_default {
342			pdmclkdat_default_mux {
343				ste,function = "pdm";
344				ste,pins = "pdmclkdat_d_1";
345			};
346			pdmclkdat_default_cfg {
347				ste,pins = "GPIO55", "GPIO56";
348				bias-disable;
349			};
350		};
351	};
352};
353