1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/pinctrl/renesas,pfc.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Renesas Pin Function Controller (GPIO and Pin Mux/Config)
8
9maintainers:
10  - Geert Uytterhoeven <geert+renesas@glider.be>
11
12description:
13  The Pin Function Controller (PFC) is a Pin Mux/Config controller.
14  On SH/R-Mobile SoCs it also acts as a GPIO controller.
15
16properties:
17  compatible:
18    enum:
19      - renesas,pfc-emev2       # EMMA Mobile EV2
20      - renesas,pfc-r8a73a4     # R-Mobile APE6
21      - renesas,pfc-r8a7740     # R-Mobile A1
22      - renesas,pfc-r8a7742     # RZ/G1H
23      - renesas,pfc-r8a7743     # RZ/G1M
24      - renesas,pfc-r8a7744     # RZ/G1N
25      - renesas,pfc-r8a7745     # RZ/G1E
26      - renesas,pfc-r8a77470    # RZ/G1C
27      - renesas,pfc-r8a774a1    # RZ/G2M
28      - renesas,pfc-r8a774b1    # RZ/G2N
29      - renesas,pfc-r8a774c0    # RZ/G2E
30      - renesas,pfc-r8a774e1    # RZ/G2H
31      - renesas,pfc-r8a7778     # R-Car M1
32      - renesas,pfc-r8a7779     # R-Car H1
33      - renesas,pfc-r8a7790     # R-Car H2
34      - renesas,pfc-r8a7791     # R-Car M2-W
35      - renesas,pfc-r8a7792     # R-Car V2H
36      - renesas,pfc-r8a7793     # R-Car M2-N
37      - renesas,pfc-r8a7794     # R-Car E2
38      - renesas,pfc-r8a7795     # R-Car H3
39      - renesas,pfc-r8a7796     # R-Car M3-W
40      - renesas,pfc-r8a77961    # R-Car M3-W+
41      - renesas,pfc-r8a77965    # R-Car M3-N
42      - renesas,pfc-r8a77970    # R-Car V3M
43      - renesas,pfc-r8a77980    # R-Car V3H
44      - renesas,pfc-r8a77990    # R-Car E3
45      - renesas,pfc-r8a77995    # R-Car D3
46      - renesas,pfc-r8a779a0    # R-Car V3U
47      - renesas,pfc-sh73a0      # SH-Mobile AG5
48
49  reg:
50    minItems: 1
51    maxItems: 10
52
53  gpio-controller: true
54
55  '#gpio-cells':
56    const: 2
57
58  gpio-ranges:
59    minItems: 1
60    maxItems: 16
61
62  interrupts-extended:
63    minItems: 32
64    maxItems: 64
65    description:
66      Specify the interrupts associated with external IRQ pins on SoCs where
67      the PFC acts as a GPIO controller.  It must contain one interrupt per
68      external IRQ, sorted by external IRQ number.
69
70  power-domains:
71    maxItems: 1
72
73required:
74  - compatible
75  - reg
76
77if:
78  properties:
79    compatible:
80      enum:
81        - renesas,pfc-r8a73a4
82        - renesas,pfc-r8a7740
83        - renesas,pfc-sh73a0
84then:
85  required:
86    - interrupts-extended
87    - gpio-controller
88    - '#gpio-cells'
89    - gpio-ranges
90    - power-domains
91
92additionalProperties:
93  anyOf:
94    - type: object
95      allOf:
96        - $ref: pincfg-node.yaml#
97        - $ref: pinmux-node.yaml#
98
99      description:
100        Pin controller client devices use pin configuration subnodes (children
101        and grandchildren) for desired pin configuration.
102        Client device subnodes use below standard properties.
103
104      properties:
105        phandle: true
106        function: true
107        groups: true
108        pins: true
109        bias-disable: true
110        bias-pull-down: true
111        bias-pull-up: true
112        drive-strength:
113          enum: [ 3, 6, 9, 12, 15, 18, 21, 24 ] # Superset of supported values
114        power-source:
115          enum: [ 1800, 3300 ]
116        gpio-hog: true
117        gpios: true
118        input: true
119        output-high: true
120        output-low: true
121
122      additionalProperties: false
123
124    - type: object
125      properties:
126        phandle: true
127
128      additionalProperties:
129        $ref: "#/additionalProperties/anyOf/0"
130
131examples:
132  - |
133    pfc: pinctrl@e6050000 {
134            compatible = "renesas,pfc-r8a7740";
135            reg = <0xe6050000 0x8000>,
136                  <0xe605800c 0x20>;
137            gpio-controller;
138            #gpio-cells = <2>;
139            gpio-ranges = <&pfc 0 0 212>;
140            interrupts-extended =
141                <&irqpin0 0 0>, <&irqpin0 1 0>, <&irqpin0 2 0>, <&irqpin0 3 0>,
142                <&irqpin0 4 0>, <&irqpin0 5 0>, <&irqpin0 6 0>, <&irqpin0 7 0>,
143                <&irqpin1 0 0>, <&irqpin1 1 0>, <&irqpin1 2 0>, <&irqpin1 3 0>,
144                <&irqpin1 4 0>, <&irqpin1 5 0>, <&irqpin1 6 0>, <&irqpin1 7 0>,
145                <&irqpin2 0 0>, <&irqpin2 1 0>, <&irqpin2 2 0>, <&irqpin2 3 0>,
146                <&irqpin2 4 0>, <&irqpin2 5 0>, <&irqpin2 6 0>, <&irqpin2 7 0>,
147                <&irqpin3 0 0>, <&irqpin3 1 0>, <&irqpin3 2 0>, <&irqpin3 3 0>,
148                <&irqpin3 4 0>, <&irqpin3 5 0>, <&irqpin3 6 0>, <&irqpin3 7 0>;
149            power-domains = <&pd_c5>;
150
151            lcd0-mux-hog {
152                    /* DBGMD/LCDC0/FSIA MUX */
153                    gpio-hog;
154                    gpios = <176 0>;
155                    output-high;
156            };
157    };
158
159  - |
160    pinctrl@e6060000 {
161            compatible = "renesas,pfc-r8a7795";
162            reg = <0xe6060000 0x50c>;
163
164            avb_pins: avb {
165                    mux {
166                            groups = "avb_link", "avb_mdio", "avb_mii";
167                            function = "avb";
168                    };
169
170                    pins_mdio {
171                            groups = "avb_mdio";
172                            drive-strength = <24>;
173                    };
174
175                    pins_mii_tx {
176                            pins = "PIN_AVB_TX_CTL", "PIN_AVB_TXC",
177                                   "PIN_AVB_TD0", "PIN_AVB_TD1", "PIN_AVB_TD2",
178                                   "PIN_AVB_TD3";
179                            drive-strength = <12>;
180                    };
181            };
182
183            keys_pins: keys {
184                    pins = "GP_5_17", "GP_5_20", "GP_5_22", "GP_2_1";
185                    bias-pull-up;
186            };
187
188            sdhi0_pins: sd0 {
189                    groups = "sdhi0_data4", "sdhi0_ctrl";
190                    function = "sdhi0";
191                    power-source = <3300>;
192            };
193    };
194