1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/pinctrl/renesas,pfc.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Renesas Pin Function Controller (GPIO and Pin Mux/Config)
8
9maintainers:
10  - Geert Uytterhoeven <geert+renesas@glider.be>
11
12description:
13  The Pin Function Controller (PFC) is a Pin Mux/Config controller.
14  On SH/R-Mobile SoCs it also acts as a GPIO controller.
15
16properties:
17  compatible:
18    enum:
19      - renesas,pfc-emev2       # EMMA Mobile EV2
20      - renesas,pfc-r8a73a4     # R-Mobile APE6
21      - renesas,pfc-r8a7740     # R-Mobile A1
22      - renesas,pfc-r8a7742     # RZ/G1H
23      - renesas,pfc-r8a7743     # RZ/G1M
24      - renesas,pfc-r8a7744     # RZ/G1N
25      - renesas,pfc-r8a7745     # RZ/G1E
26      - renesas,pfc-r8a77470    # RZ/G1C
27      - renesas,pfc-r8a774a1    # RZ/G2M
28      - renesas,pfc-r8a774b1    # RZ/G2N
29      - renesas,pfc-r8a774c0    # RZ/G2E
30      - renesas,pfc-r8a774e1    # RZ/G2H
31      - renesas,pfc-r8a7778     # R-Car M1
32      - renesas,pfc-r8a7779     # R-Car H1
33      - renesas,pfc-r8a7790     # R-Car H2
34      - renesas,pfc-r8a7791     # R-Car M2-W
35      - renesas,pfc-r8a7792     # R-Car V2H
36      - renesas,pfc-r8a7793     # R-Car M2-N
37      - renesas,pfc-r8a7794     # R-Car E2
38      - renesas,pfc-r8a7795     # R-Car H3
39      - renesas,pfc-r8a7796     # R-Car M3-W
40      - renesas,pfc-r8a77961    # R-Car M3-W+
41      - renesas,pfc-r8a77965    # R-Car M3-N
42      - renesas,pfc-r8a77970    # R-Car V3M
43      - renesas,pfc-r8a77980    # R-Car V3H
44      - renesas,pfc-r8a77990    # R-Car E3
45      - renesas,pfc-r8a77995    # R-Car D3
46      - renesas,pfc-sh73a0      # SH-Mobile AG5
47
48  reg:
49    minItems: 1
50    maxItems: 2
51
52  gpio-controller: true
53
54  '#gpio-cells':
55    const: 2
56
57  gpio-ranges:
58    minItems: 1
59    maxItems: 16
60
61  interrupts-extended:
62    minItems: 32
63    maxItems: 64
64    description:
65      Specify the interrupts associated with external IRQ pins on SoCs where
66      the PFC acts as a GPIO controller.  It must contain one interrupt per
67      external IRQ, sorted by external IRQ number.
68
69  power-domains:
70    maxItems: 1
71
72required:
73  - compatible
74  - reg
75
76if:
77  properties:
78    compatible:
79      enum:
80        - renesas,pfc-r8a73a4
81        - renesas,pfc-r8a7740
82        - renesas,pfc-sh73a0
83then:
84  required:
85    - interrupts-extended
86    - gpio-controller
87    - '#gpio-cells'
88    - gpio-ranges
89    - power-domains
90
91additionalProperties:
92  anyOf:
93    - type: object
94      allOf:
95        - $ref: pincfg-node.yaml#
96        - $ref: pinmux-node.yaml#
97
98      description:
99        Pin controller client devices use pin configuration subnodes (children
100        and grandchildren) for desired pin configuration.
101        Client device subnodes use below standard properties.
102
103      properties:
104        phandle: true
105        function: true
106        groups: true
107        pins: true
108        bias-disable: true
109        bias-pull-down: true
110        bias-pull-up: true
111        drive-strength:
112          enum: [ 3, 6, 9, 12, 15, 18, 21, 24 ] # Superset of supported values
113        power-source:
114          enum: [ 1800, 3300 ]
115        gpio-hog: true
116        gpios: true
117        input: true
118        output-high: true
119        output-low: true
120
121      additionalProperties: false
122
123    - type: object
124      properties:
125        phandle: true
126
127      additionalProperties:
128        $ref: "#/additionalProperties/anyOf/0"
129
130examples:
131  - |
132    pfc: pinctrl@e6050000 {
133            compatible = "renesas,pfc-r8a7740";
134            reg = <0xe6050000 0x8000>,
135                  <0xe605800c 0x20>;
136            gpio-controller;
137            #gpio-cells = <2>;
138            gpio-ranges = <&pfc 0 0 212>;
139            interrupts-extended =
140                <&irqpin0 0 0>, <&irqpin0 1 0>, <&irqpin0 2 0>, <&irqpin0 3 0>,
141                <&irqpin0 4 0>, <&irqpin0 5 0>, <&irqpin0 6 0>, <&irqpin0 7 0>,
142                <&irqpin1 0 0>, <&irqpin1 1 0>, <&irqpin1 2 0>, <&irqpin1 3 0>,
143                <&irqpin1 4 0>, <&irqpin1 5 0>, <&irqpin1 6 0>, <&irqpin1 7 0>,
144                <&irqpin2 0 0>, <&irqpin2 1 0>, <&irqpin2 2 0>, <&irqpin2 3 0>,
145                <&irqpin2 4 0>, <&irqpin2 5 0>, <&irqpin2 6 0>, <&irqpin2 7 0>,
146                <&irqpin3 0 0>, <&irqpin3 1 0>, <&irqpin3 2 0>, <&irqpin3 3 0>,
147                <&irqpin3 4 0>, <&irqpin3 5 0>, <&irqpin3 6 0>, <&irqpin3 7 0>;
148            power-domains = <&pd_c5>;
149
150            lcd0-mux-hog {
151                    /* DBGMD/LCDC0/FSIA MUX */
152                    gpio-hog;
153                    gpios = <176 0>;
154                    output-high;
155            };
156    };
157
158  - |
159    pinctrl@e6060000 {
160            compatible = "renesas,pfc-r8a7795";
161            reg = <0xe6060000 0x50c>;
162
163            avb_pins: avb {
164                    mux {
165                            groups = "avb_link", "avb_mdio", "avb_mii";
166                            function = "avb";
167                    };
168
169                    pins_mdio {
170                            groups = "avb_mdio";
171                            drive-strength = <24>;
172                    };
173
174                    pins_mii_tx {
175                            pins = "PIN_AVB_TX_CTL", "PIN_AVB_TXC",
176                                   "PIN_AVB_TD0", "PIN_AVB_TD1", "PIN_AVB_TD2",
177                                   "PIN_AVB_TD3";
178                            drive-strength = <12>;
179                    };
180            };
181
182            keys_pins: keys {
183                    pins = "GP_5_17", "GP_5_20", "GP_5_22", "GP_2_1";
184                    bias-pull-up;
185            };
186
187            sdhi0_pins: sd0 {
188                    groups = "sdhi0_data4", "sdhi0_ctrl";
189                    function = "sdhi0";
190                    power-source = <3300>;
191            };
192    };
193