1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/pinctrl/qcom,qcm2290-tlmm.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Qualcomm Technologies, Inc. QCM2290 TLMM block
8
9maintainers:
10  - Shawn Guo <shawn.guo@linaro.org>
11
12description:
13  Top Level Mode Multiplexer pin controller in Qualcomm QCM2290 SoC.
14
15properties:
16  compatible:
17    const: qcom,qcm2290-tlmm
18
19  reg:
20    maxItems: 1
21
22  interrupts: true
23  interrupt-controller: true
24  "#interrupt-cells": true
25  gpio-controller: true
26  "#gpio-cells": true
27  gpio-ranges: true
28  wakeup-parent: true
29
30patternProperties:
31  "-state$":
32    oneOf:
33      - $ref: "#/$defs/qcom-qcm2290-tlmm-state"
34      - patternProperties:
35          "-pins$":
36            $ref: "#/$defs/qcom-qcm2290-tlmm-state"
37        additionalProperties: false
38
39$defs:
40  qcom-qcm2290-tlmm-state:
41    type: object
42    description:
43      Pinctrl node's client devices use subnodes for desired pin configuration.
44      Client device subnodes use below standard properties.
45    $ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state
46
47    properties:
48      pins:
49        description:
50          List of gpio pins affected by the properties specified in this
51          subnode.
52        items:
53          oneOf:
54            - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-1][0-9]|12[0-6])$"
55            - enum: [ sdc1_rclk, sdc1_clk, sdc1_cmd, sdc1_data,
56                      sdc2_clk, sdc2_cmd, sdc2_data ]
57        minItems: 1
58        maxItems: 36
59
60      function:
61        description:
62          Specify the alternative function to be configured for the specified
63          pins.
64
65        enum: [ adsp_ext, agera_pll, atest, cam_mclk, cci_async, cci_i2c,
66                cci_timer0, cci_timer1, cci_timer2, cci_timer3, char_exec,
67                cri_trng, cri_trng0, cri_trng1, dac_calib, dbg_out, ddr_bist,
68                ddr_pxi0, ddr_pxi1, ddr_pxi2, ddr_pxi3, gcc_gp1, gcc_gp2,
69                gcc_gp3, gpio, gp_pdm0, gp_pdm1, gp_pdm2, gsm0_tx, gsm1_tx,
70                jitter_bist, mdp_vsync, mdp_vsync_out_0, mdp_vsync_out_1,
71                mpm_pwr, mss_lte, m_voc, nav_gpio, pa_indicator, pbs0, pbs1,
72                pbs2, pbs3, pbs4, pbs5, pbs6, pbs7, pbs8, pbs9, pbs10, pbs11,
73                pbs12, pbs13, pbs14, pbs15, pbs_out, phase_flag, pll_bist,
74                pll_bypassnl, pll_reset, prng_rosc, pwm_0, pwm_1, pwm_2, pwm_3,
75                pwm_4, pwm_5, pwm_6, pwm_7, pwm_8, pwm_9, qdss_cti, qdss_gpio,
76                qup0, qup1, qup2, qup3, qup4, qup5, sdc1_tb, sdc2_tb, sd_write,
77                ssbi_wtr1, tgu_ch0, tgu_ch1, tgu_ch2, tgu_ch3, tsense_pwm,
78                uim1_clk, uim1_data, uim1_present, uim1_reset, uim2_clk,
79                uim2_data, uim2_present, uim2_reset, usb_phy, vfr_1,
80                vsense_trigger, wlan1_adc0, wlan1_adc1 ]
81
82      bias-pull-down: true
83      bias-pull-up: true
84      bias-disable: true
85      drive-strength: true
86      output-high: true
87      output-low: true
88
89    required:
90      - pins
91
92    additionalProperties: false
93
94allOf:
95  - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#
96
97required:
98  - compatible
99  - reg
100
101additionalProperties: false
102
103examples:
104  - |
105    #include <dt-bindings/interrupt-controller/arm-gic.h>
106    tlmm: pinctrl@500000 {
107        compatible = "qcom,qcm2290-tlmm";
108        reg = <0x500000 0x300000>;
109        interrupts = <GIC_SPI 227 IRQ_TYPE_LEVEL_HIGH>;
110        gpio-controller;
111        #gpio-cells = <2>;
112        interrupt-controller;
113        #interrupt-cells = <2>;
114        gpio-ranges = <&tlmm 0 0 127>;
115
116        sdc2_on_state: sdc2-on-state {
117            clk-pins {
118                pins = "sdc2_clk";
119                bias-disable;
120                drive-strength = <16>;
121            };
122
123            cmd-pins {
124                pins = "sdc2_cmd";
125                bias-pull-up;
126                drive-strength = <10>;
127            };
128
129            data-pins {
130                pins = "sdc2_data";
131                bias-pull-up;
132                drive-strength = <10>;
133            };
134        };
135    };
136