1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/pinctrl/qcom,pmic-gpio.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Qualcomm PMIC GPIO block 8 9maintainers: 10 - Bjorn Andersson <bjorn.andersson@linaro.org> 11 12description: 13 This binding describes the GPIO block(s) found in the 8xxx series of 14 PMIC's from Qualcomm. 15 16properties: 17 compatible: 18 items: 19 - enum: 20 - qcom,pm660-gpio 21 - qcom,pm660l-gpio 22 - qcom,pm6150-gpio 23 - qcom,pm6150l-gpio 24 - qcom,pm7325-gpio 25 - qcom,pm8005-gpio 26 - qcom,pm8008-gpio 27 - qcom,pm8018-gpio 28 - qcom,pm8038-gpio 29 - qcom,pm8058-gpio 30 - qcom,pm8150-gpio 31 - qcom,pm8150b-gpio 32 - qcom,pm8350-gpio 33 - qcom,pm8350b-gpio 34 - qcom,pm8350c-gpio 35 - qcom,pm8916-gpio 36 - qcom,pm8917-gpio 37 - qcom,pm8921-gpio 38 - qcom,pm8941-gpio 39 - qcom,pm8950-gpio 40 - qcom,pm8994-gpio 41 - qcom,pm8998-gpio 42 - qcom,pma8084-gpio 43 - qcom,pmi8950-gpio 44 - qcom,pmi8994-gpio 45 - qcom,pmi8998-gpio 46 - qcom,pmk8350-gpio 47 - qcom,pmr735a-gpio 48 - qcom,pmr735b-gpio 49 - qcom,pms405-gpio 50 - qcom,pmx55-gpio 51 52 - enum: 53 - qcom,spmi-gpio 54 - qcom,ssbi-gpio 55 56 reg: 57 maxItems: 1 58 59 interrupt-controller: true 60 61 '#interrupt-cells': 62 const: 2 63 64 gpio-controller: true 65 66 gpio-ranges: 67 maxItems: 1 68 69 '#gpio-cells': 70 const: 2 71 description: 72 The first cell will be used to define gpio number and the 73 second denotes the flags for this gpio 74 75additionalProperties: false 76 77required: 78 - compatible 79 - reg 80 - gpio-controller 81 - '#gpio-cells' 82 - gpio-ranges 83 - interrupt-controller 84 85patternProperties: 86 '-state$': 87 oneOf: 88 - $ref: "#/$defs/qcom-pmic-gpio-state" 89 - patternProperties: 90 ".*": 91 $ref: "#/$defs/qcom-pmic-gpio-state" 92 93$defs: 94 qcom-pmic-gpio-state: 95 type: object 96 allOf: 97 - $ref: "pinmux-node.yaml" 98 - $ref: "pincfg-node.yaml" 99 properties: 100 pins: 101 description: 102 List of gpio pins affected by the properties specified in 103 this subnode. Valid pins are 104 - gpio1-gpio10 for pm6150 105 - gpio1-gpio12 for pm6150l 106 - gpio1-gpio10 for pm7325 107 - gpio1-gpio4 for pm8005 108 - gpio1-gpio2 for pm8008 109 - gpio1-gpio6 for pm8018 110 - gpio1-gpio12 for pm8038 111 - gpio1-gpio40 for pm8058 112 - gpio1-gpio10 for pm8150 (holes on gpio2, gpio5, 113 gpio7 and gpio8) 114 - gpio1-gpio12 for pm8150b (holes on gpio3, gpio4 115 and gpio7) 116 - gpio1-gpio12 for pm8150l (hole on gpio7) 117 - gpio1-gpio4 for pm8916 118 - gpio1-gpio10 for pm8350 119 - gpio1-gpio8 for pm8350b 120 - gpio1-gpio9 for pm8350c 121 - gpio1-gpio38 for pm8917 122 - gpio1-gpio44 for pm8921 123 - gpio1-gpio36 for pm8941 124 - gpio1-gpio8 for pm8950 (hole on gpio3) 125 - gpio1-gpio22 for pm8994 126 - gpio1-gpio26 for pm8998 127 - gpio1-gpio22 for pma8084 128 - gpio1-gpio2 for pmi8950 129 - gpio1-gpio10 for pmi8994 130 - gpio1-gpio4 for pmk8350 131 - gpio1-gpio4 for pmr735a 132 - gpio1-gpio4 for pmr735b 133 - gpio1-gpio12 for pms405 (holes on gpio1, gpio9 134 and gpio10) 135 - gpio1-gpio11 for pmx55 (holes on gpio3, gpio7, gpio10 136 and gpio11) 137 138 items: 139 pattern: "^gpio([0-9]+)$" 140 141 function: 142 items: 143 - enum: 144 - normal 145 - paired 146 - func1 147 - func2 148 - dtest1 149 - dtest2 150 - dtest3 151 - dtest4 152 - func3 # supported by LV/MV GPIO subtypes 153 - func4 # supported by LV/MV GPIO subtypes 154 155 bias-disable: true 156 bias-pull-down: true 157 bias-pull-up: true 158 159 qcom,pull-up-strength: 160 $ref: /schemas/types.yaml#/definitions/uint32 161 description: 162 Specifies the strength to use for pull up, if selected. 163 Valid values are defined in 164 <dt-bindings/pinctrl/qcom,pmic-gpio.h> 165 If this property is omitted 30uA strength will be used 166 if pull up is selected 167 enum: [0, 1, 2, 3] 168 169 bias-high-impedance: true 170 input-enable: true 171 output-high: true 172 output-low: true 173 power-source: true 174 175 qcom,drive-strength: 176 $ref: /schemas/types.yaml#/definitions/uint32 177 description: 178 Selects the drive strength for the specified pins 179 Valid drive strength values are defined in 180 <dt-bindings/pinctrl/qcom,pmic-gpio.h> 181 enum: [0, 1, 2, 3] 182 183 drive-push-pull: true 184 drive-open-drain: true 185 drive-open-source: true 186 187 qcom,analog-pass: 188 $ref: /schemas/types.yaml#/definitions/flag 189 description: 190 The specified pins are configured in 191 analog-pass-through mode. 192 193 qcom,atest: 194 $ref: /schemas/types.yaml#/definitions/uint32 195 description: 196 Selects ATEST rail to route to GPIO when it's 197 configured in analog-pass-through mode. 198 enum: [1, 2, 3, 4] 199 200 qcom,dtest-buffer: 201 $ref: /schemas/types.yaml#/definitions/uint32 202 description: 203 Selects DTEST rail to route to GPIO when it's 204 configured as digital input. 205 enum: [1, 2, 3, 4] 206 207 required: 208 - pins 209 - function 210 211 additionalProperties: false 212 213examples: 214 - | 215 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h> 216 217 pm8921_gpio: gpio@150 { 218 compatible = "qcom,pm8921-gpio", "qcom,ssbi-gpio"; 219 reg = <0x150 0x160>; 220 interrupt-controller; 221 #interrupt-cells = <2>; 222 gpio-controller; 223 gpio-ranges = <&pm8921_gpio 0 0 44>; 224 #gpio-cells = <2>; 225 226 pm8921_gpio_keys: gpio-keys-state { 227 volume-keys { 228 pins = "gpio20", "gpio21"; 229 function = "normal"; 230 231 input-enable; 232 bias-pull-up; 233 drive-push-pull; 234 qcom,drive-strength = <PMIC_GPIO_STRENGTH_NO>; 235 power-source = <PM8921_GPIO_S4>; 236 }; 237 }; 238 }; 239... 240