1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/pinctrl/qcom,pmic-gpio.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Qualcomm PMIC GPIO block 8 9maintainers: 10 - Bjorn Andersson <bjorn.andersson@linaro.org> 11 12description: 13 This binding describes the GPIO block(s) found in the 8xxx series of 14 PMIC's from Qualcomm. 15 16properties: 17 compatible: 18 items: 19 - enum: 20 - qcom,pm2250-gpio 21 - qcom,pm660-gpio 22 - qcom,pm660l-gpio 23 - qcom,pm6150-gpio 24 - qcom,pm6150l-gpio 25 - qcom,pm6350-gpio 26 - qcom,pm7325-gpio 27 - qcom,pm8005-gpio 28 - qcom,pm8008-gpio 29 - qcom,pm8018-gpio 30 - qcom,pm8019-gpio 31 - qcom,pm8038-gpio 32 - qcom,pm8058-gpio 33 - qcom,pm8150-gpio 34 - qcom,pm8150b-gpio 35 - qcom,pm8226-gpio 36 - qcom,pm8350-gpio 37 - qcom,pm8350b-gpio 38 - qcom,pm8350c-gpio 39 - qcom,pm8916-gpio 40 - qcom,pm8917-gpio 41 - qcom,pm8921-gpio 42 - qcom,pm8941-gpio 43 - qcom,pm8950-gpio 44 - qcom,pm8994-gpio 45 - qcom,pm8998-gpio 46 - qcom,pma8084-gpio 47 - qcom,pmi8950-gpio 48 - qcom,pmi8994-gpio 49 - qcom,pmi8998-gpio 50 - qcom,pmk8350-gpio 51 - qcom,pmr735a-gpio 52 - qcom,pmr735b-gpio 53 - qcom,pms405-gpio 54 - qcom,pmx55-gpio 55 56 - enum: 57 - qcom,spmi-gpio 58 - qcom,ssbi-gpio 59 60 reg: 61 maxItems: 1 62 63 interrupt-controller: true 64 65 '#interrupt-cells': 66 const: 2 67 68 gpio-controller: true 69 70 gpio-ranges: 71 maxItems: 1 72 73 '#gpio-cells': 74 const: 2 75 description: 76 The first cell will be used to define gpio number and the 77 second denotes the flags for this gpio 78 79additionalProperties: false 80 81required: 82 - compatible 83 - reg 84 - gpio-controller 85 - '#gpio-cells' 86 - gpio-ranges 87 - interrupt-controller 88 89patternProperties: 90 '-state$': 91 oneOf: 92 - $ref: "#/$defs/qcom-pmic-gpio-state" 93 - patternProperties: 94 ".*": 95 $ref: "#/$defs/qcom-pmic-gpio-state" 96 97$defs: 98 qcom-pmic-gpio-state: 99 type: object 100 allOf: 101 - $ref: "pinmux-node.yaml" 102 - $ref: "pincfg-node.yaml" 103 properties: 104 pins: 105 description: 106 List of gpio pins affected by the properties specified in 107 this subnode. Valid pins are 108 - gpio1-gpio10 for pm6150 109 - gpio1-gpio12 for pm6150l 110 - gpio1-gpio9 for pm6350 111 - gpio1-gpio10 for pm7325 112 - gpio1-gpio4 for pm8005 113 - gpio1-gpio2 for pm8008 114 - gpio1-gpio6 for pm8018 115 - gpio1-gpio12 for pm8038 116 - gpio1-gpio40 for pm8058 117 - gpio1-gpio10 for pm8150 (holes on gpio2, gpio5, 118 gpio7 and gpio8) 119 - gpio1-gpio12 for pm8150b (holes on gpio3, gpio4 120 and gpio7) 121 - gpio1-gpio12 for pm8150l (hole on gpio7) 122 - gpio1-gpio4 for pm8916 123 - gpio1-gpio10 for pm8350 124 - gpio1-gpio8 for pm8350b 125 - gpio1-gpio9 for pm8350c 126 - gpio1-gpio38 for pm8917 127 - gpio1-gpio44 for pm8921 128 - gpio1-gpio36 for pm8941 129 - gpio1-gpio8 for pm8950 (hole on gpio3) 130 - gpio1-gpio22 for pm8994 131 - gpio1-gpio26 for pm8998 132 - gpio1-gpio22 for pma8084 133 - gpio1-gpio2 for pmi8950 134 - gpio1-gpio10 for pmi8994 135 - gpio1-gpio4 for pmk8350 136 - gpio1-gpio4 for pmr735a 137 - gpio1-gpio4 for pmr735b 138 - gpio1-gpio12 for pms405 (holes on gpio1, gpio9 139 and gpio10) 140 - gpio1-gpio11 for pmx55 (holes on gpio3, gpio7, gpio10 141 and gpio11) 142 143 items: 144 pattern: "^gpio([0-9]+)$" 145 146 function: 147 items: 148 - enum: 149 - normal 150 - paired 151 - func1 152 - func2 153 - dtest1 154 - dtest2 155 - dtest3 156 - dtest4 157 - func3 # supported by LV/MV GPIO subtypes 158 - func4 # supported by LV/MV GPIO subtypes 159 160 bias-disable: true 161 bias-pull-down: true 162 bias-pull-up: true 163 164 qcom,pull-up-strength: 165 $ref: /schemas/types.yaml#/definitions/uint32 166 description: 167 Specifies the strength to use for pull up, if selected. 168 Valid values are defined in 169 <dt-bindings/pinctrl/qcom,pmic-gpio.h> 170 If this property is omitted 30uA strength will be used 171 if pull up is selected 172 enum: [0, 1, 2, 3] 173 174 bias-high-impedance: true 175 input-enable: true 176 output-high: true 177 output-low: true 178 output-enable: true 179 output-disable: true 180 power-source: true 181 182 qcom,drive-strength: 183 $ref: /schemas/types.yaml#/definitions/uint32 184 description: 185 Selects the drive strength for the specified pins 186 Valid drive strength values are defined in 187 <dt-bindings/pinctrl/qcom,pmic-gpio.h> 188 enum: [0, 1, 2, 3] 189 190 drive-push-pull: true 191 drive-open-drain: true 192 drive-open-source: true 193 194 qcom,analog-pass: 195 $ref: /schemas/types.yaml#/definitions/flag 196 description: 197 The specified pins are configured in 198 analog-pass-through mode. 199 200 qcom,atest: 201 $ref: /schemas/types.yaml#/definitions/uint32 202 description: 203 Selects ATEST rail to route to GPIO when it's 204 configured in analog-pass-through mode. 205 enum: [1, 2, 3, 4] 206 207 qcom,dtest-buffer: 208 $ref: /schemas/types.yaml#/definitions/uint32 209 description: 210 Selects DTEST rail to route to GPIO when it's 211 configured as digital input. 212 enum: [1, 2, 3, 4] 213 214 required: 215 - pins 216 - function 217 218 additionalProperties: false 219 220examples: 221 - | 222 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h> 223 224 pm8921_gpio: gpio@150 { 225 compatible = "qcom,pm8921-gpio", "qcom,ssbi-gpio"; 226 reg = <0x150 0x160>; 227 interrupt-controller; 228 #interrupt-cells = <2>; 229 gpio-controller; 230 gpio-ranges = <&pm8921_gpio 0 0 44>; 231 #gpio-cells = <2>; 232 233 pm8921_gpio_keys: gpio-keys-state { 234 volume-keys { 235 pins = "gpio20", "gpio21"; 236 function = "normal"; 237 238 input-enable; 239 bias-pull-up; 240 drive-push-pull; 241 qcom,drive-strength = <PMIC_GPIO_STRENGTH_NO>; 242 power-source = <PM8921_GPIO_S4>; 243 }; 244 }; 245 }; 246... 247