1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/pinctrl/qcom,msm8998-pinctrl.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Qualcomm MSM8998 TLMM pin controller
8
9maintainers:
10  - Bjorn Andersson <andersson@kernel.org>
11  - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
12
13description:
14  Top Level Mode Multiplexer pin controller in Qualcomm MSM8998 SoC.
15
16properties:
17  compatible:
18    const: qcom,msm8998-pinctrl
19
20  reg:
21    maxItems: 1
22
23  interrupts:
24    maxItems: 1
25
26  interrupt-controller: true
27  "#interrupt-cells": true
28  gpio-controller: true
29  "#gpio-cells": true
30  gpio-ranges: true
31  wakeup-parent: true
32
33  gpio-reserved-ranges:
34    minItems: 1
35    maxItems: 75
36
37  gpio-line-names:
38    maxItems: 150
39
40patternProperties:
41  "-state$":
42    oneOf:
43      - $ref: "#/$defs/qcom-msm8998-tlmm-state"
44      - patternProperties:
45          "-pins$":
46            $ref: "#/$defs/qcom-msm8998-tlmm-state"
47        additionalProperties: false
48
49$defs:
50  qcom-msm8998-tlmm-state:
51    type: object
52    description:
53      Pinctrl node's client devices use subnodes for desired pin configuration.
54      Client device subnodes use below standard properties.
55    $ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state
56
57    properties:
58      pins:
59        description:
60          List of gpio pins affected by the properties specified in this
61          subnode.
62        items:
63          oneOf:
64            - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-4][0-9])$"
65            - enum: [ sdc2_clk, sdc2_cmd, sdc2_data, ufs_reset ]
66        minItems: 1
67        maxItems: 36
68
69      function:
70        description:
71          Specify the alternative function to be configured for the specified
72          pins.
73
74        enum: [ gpio, adsp_ext, agera_pll, atest_char, atest_gpsadc0,
75                atest_gpsadc1, atest_tsens, atest_tsens2, atest_usb1,
76                atest_usb10, atest_usb11, atest_usb12, atest_usb13, audio_ref,
77                bimc_dte0, bimc_dte1, blsp10_spi, blsp10_spi_a, blsp10_spi_b,
78                blsp11_i2c, blsp1_spi, blsp1_spi_a, blsp1_spi_b, blsp2_spi,
79                blsp9_spi, blsp_i2c1, blsp_i2c2, blsp_i2c3, blsp_i2c4,
80                blsp_i2c5, blsp_i2c6, blsp_i2c7, blsp_i2c8, blsp_i2c9,
81                blsp_i2c10, blsp_i2c11, blsp_i2c12, blsp_spi1, blsp_spi2,
82                blsp_spi3, blsp_spi4, blsp_spi5, blsp_spi6, blsp_spi7,
83                blsp_spi8, blsp_spi9, blsp_spi10, blsp_spi11, blsp_spi12,
84                blsp_uart1_a, blsp_uart1_b, blsp_uart2_a, blsp_uart2_b,
85                blsp_uart3_a, blsp_uart3_b, blsp_uart7_a, blsp_uart7_b,
86                blsp_uart8, blsp_uart8_a, blsp_uart8_b, blsp_uart9_a,
87                blsp_uart9_b, blsp_uim1_a, blsp_uim1_b, blsp_uim2_a,
88                blsp_uim2_b, blsp_uim3_a, blsp_uim3_b, blsp_uim7_a,
89                blsp_uim7_b, blsp_uim8_a, blsp_uim8_b, blsp_uim9_a,
90                blsp_uim9_b, bt_reset, btfm_slimbus, cam_mclk, cci_async,
91                cci_i2c, cci_timer0, cci_timer1, cci_timer2, cci_timer3,
92                cci_timer4, cri_trng, cri_trng0, cri_trng1, dbg_out, ddr_bist,
93                edp_hot, edp_lcd, gcc_gp1_a, gcc_gp1_b, gcc_gp2_a, gcc_gp2_b,
94                gcc_gp3_a, gcc_gp3_b, hdmi_cec, hdmi_ddc, hdmi_hot, hdmi_rcv,
95                isense_dbg, jitter_bist, ldo_en, ldo_update, lpass_slimbus,
96                m_voc, mdp_vsync, mdp_vsync0, mdp_vsync1, mdp_vsync2,
97                mdp_vsync3, mdp_vsync_a, mdp_vsync_b, modem_tsync, mss_lte,
98                nav_dr, nav_pps, pa_indicator, pci_e0, phase_flag,
99                pll_bypassnl, pll_reset, pri_mi2s, pri_mi2s_ws, prng_rosc,
100                pwr_crypto, pwr_modem, pwr_nav, qdss_cti0_a, qdss_cti0_b,
101                qdss_cti1_a, qdss_cti1_b, qdss, qlink_enable, qlink_request,
102                qua_mi2s, sd_card, sd_write, sdc40, sdc41, sdc42, sdc43,
103                sdc4_clk, sdc4_cmd, sec_mi2s, sp_cmu, spkr_i2s, ssbi1, ssc_irq,
104                ter_mi2s, tgu_ch0, tgu_ch1, tsense_pwm1, tsense_pwm2, tsif0,
105                tsif1, uim1_clk, uim1_data, uim1_present, uim1_reset, uim2_clk,
106                uim2_data, uim2_present, uim2_reset, uim_batt, usb_phy, vfr_1,
107                vsense_clkout, vsense_data0, vsense_data1, vsense_mode,
108                wlan1_adc0, wlan1_adc1, wlan2_adc0, wlan2_adc1 ]
109
110      bias-pull-down: true
111      bias-pull-up: true
112      bias-disable: true
113      drive-strength: true
114      input-enable: true
115      output-high: true
116      output-low: true
117
118    required:
119      - pins
120
121    additionalProperties: false
122
123allOf:
124  - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#
125
126required:
127  - compatible
128  - reg
129
130additionalProperties: false
131
132examples:
133  - |
134    #include <dt-bindings/interrupt-controller/arm-gic.h>
135
136    tlmm: pinctrl@3400000 {
137        compatible = "qcom,msm8998-pinctrl";
138        reg = <0x03400000 0xc00000>;
139        interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
140        gpio-ranges = <&tlmm 0 0 150>;
141        gpio-controller;
142        #gpio-cells = <2>;
143        interrupt-controller;
144        #interrupt-cells = <2>;
145        gpio-reserved-ranges = <0 4>, <81 4>;
146
147        sdc2-off-state {
148            clk-pins {
149                pins = "sdc2_clk";
150                drive-strength = <2>;
151                bias-disable;
152            };
153
154            cmd-pins {
155                pins = "sdc2_cmd";
156                drive-strength = <2>;
157                bias-pull-up;
158            };
159
160            data-pins {
161                pins = "sdc2_data";
162                drive-strength = <2>;
163                bias-pull-up;
164            };
165        };
166
167        sdc2-cd-state {
168            pins = "gpio95";
169            function = "gpio";
170            bias-pull-up;
171            drive-strength = <2>;
172        };
173    };
174