1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/pinctrl/qcom,msm8998-pinctrl.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Qualcomm MSM8998 TLMM pin controller 8 9maintainers: 10 - Bjorn Andersson <andersson@kernel.org> 11 - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> 12 13description: 14 Top Level Mode Multiplexer pin controller in Qualcomm MSM8998 SoC. 15 16properties: 17 compatible: 18 const: qcom,msm8998-pinctrl 19 20 reg: 21 maxItems: 1 22 23 interrupts: true 24 interrupt-controller: true 25 "#interrupt-cells": true 26 gpio-controller: true 27 "#gpio-cells": true 28 gpio-ranges: true 29 wakeup-parent: true 30 31 gpio-reserved-ranges: 32 minItems: 1 33 maxItems: 75 34 35 gpio-line-names: 36 maxItems: 150 37 38patternProperties: 39 "-state$": 40 oneOf: 41 - $ref: "#/$defs/qcom-msm8998-tlmm-state" 42 - patternProperties: 43 "-pins$": 44 $ref: "#/$defs/qcom-msm8998-tlmm-state" 45 additionalProperties: false 46 47$defs: 48 qcom-msm8998-tlmm-state: 49 type: object 50 description: 51 Pinctrl node's client devices use subnodes for desired pin configuration. 52 Client device subnodes use below standard properties. 53 $ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state 54 55 properties: 56 pins: 57 description: 58 List of gpio pins affected by the properties specified in this 59 subnode. 60 items: 61 oneOf: 62 - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-4][0-9])$" 63 - enum: [ sdc2_clk, sdc2_cmd, sdc2_data, ufs_reset ] 64 minItems: 1 65 maxItems: 36 66 67 function: 68 description: 69 Specify the alternative function to be configured for the specified 70 pins. 71 72 enum: [ gpio, adsp_ext, agera_pll, atest_char, atest_gpsadc0, 73 atest_gpsadc1, atest_tsens, atest_tsens2, atest_usb1, 74 atest_usb10, atest_usb11, atest_usb12, atest_usb13, audio_ref, 75 bimc_dte0, bimc_dte1, blsp10_spi, blsp10_spi_a, blsp10_spi_b, 76 blsp11_i2c, blsp1_spi, blsp1_spi_a, blsp1_spi_b, blsp2_spi, 77 blsp9_spi, blsp_i2c1, blsp_i2c2, blsp_i2c3, blsp_i2c4, 78 blsp_i2c5, blsp_i2c6, blsp_i2c7, blsp_i2c8, blsp_i2c9, 79 blsp_i2c10, blsp_i2c11, blsp_i2c12, blsp_spi1, blsp_spi2, 80 blsp_spi3, blsp_spi4, blsp_spi5, blsp_spi6, blsp_spi7, 81 blsp_spi8, blsp_spi9, blsp_spi10, blsp_spi11, blsp_spi12, 82 blsp_uart1_a, blsp_uart1_b, blsp_uart2_a, blsp_uart2_b, 83 blsp_uart3_a, blsp_uart3_b, blsp_uart7_a, blsp_uart7_b, 84 blsp_uart8, blsp_uart8_a, blsp_uart8_b, blsp_uart9_a, 85 blsp_uart9_b, blsp_uim1_a, blsp_uim1_b, blsp_uim2_a, 86 blsp_uim2_b, blsp_uim3_a, blsp_uim3_b, blsp_uim7_a, 87 blsp_uim7_b, blsp_uim8_a, blsp_uim8_b, blsp_uim9_a, 88 blsp_uim9_b, bt_reset, btfm_slimbus, cam_mclk, cci_async, 89 cci_i2c, cci_timer0, cci_timer1, cci_timer2, cci_timer3, 90 cci_timer4, cri_trng, cri_trng0, cri_trng1, dbg_out, ddr_bist, 91 edp_hot, edp_lcd, gcc_gp1_a, gcc_gp1_b, gcc_gp2_a, gcc_gp2_b, 92 gcc_gp3_a, gcc_gp3_b, hdmi_cec, hdmi_ddc, hdmi_hot, hdmi_rcv, 93 isense_dbg, jitter_bist, ldo_en, ldo_update, lpass_slimbus, 94 m_voc, mdp_vsync, mdp_vsync0, mdp_vsync1, mdp_vsync2, 95 mdp_vsync3, mdp_vsync_a, mdp_vsync_b, modem_tsync, mss_lte, 96 nav_dr, nav_pps, pa_indicator, pci_e0, phase_flag, 97 pll_bypassnl, pll_reset, pri_mi2s, pri_mi2s_ws, prng_rosc, 98 pwr_crypto, pwr_modem, pwr_nav, qdss_cti0_a, qdss_cti0_b, 99 qdss_cti1_a, qdss_cti1_b, qdss, qlink_enable, qlink_request, 100 qua_mi2s, sd_card, sd_write, sdc40, sdc41, sdc42, sdc43, 101 sdc4_clk, sdc4_cmd, sec_mi2s, sp_cmu, spkr_i2s, ssbi1, ssc_irq, 102 ter_mi2s, tgu_ch0, tgu_ch1, tsense_pwm1, tsense_pwm2, tsif0, 103 tsif1, uim1_clk, uim1_data, uim1_present, uim1_reset, uim2_clk, 104 uim2_data, uim2_present, uim2_reset, uim_batt, usb_phy, vfr_1, 105 vsense_clkout, vsense_data0, vsense_data1, vsense_mode, 106 wlan1_adc0, wlan1_adc1, wlan2_adc0, wlan2_adc1 ] 107 108 bias-pull-down: true 109 bias-pull-up: true 110 bias-disable: true 111 drive-strength: true 112 input-enable: true 113 output-high: true 114 output-low: true 115 116 required: 117 - pins 118 119 additionalProperties: false 120 121allOf: 122 - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml# 123 124required: 125 - compatible 126 - reg 127 128additionalProperties: false 129 130examples: 131 - | 132 #include <dt-bindings/interrupt-controller/arm-gic.h> 133 134 tlmm: pinctrl@3400000 { 135 compatible = "qcom,msm8998-pinctrl"; 136 reg = <0x03400000 0xc00000>; 137 interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>; 138 gpio-ranges = <&tlmm 0 0 150>; 139 gpio-controller; 140 #gpio-cells = <2>; 141 interrupt-controller; 142 #interrupt-cells = <2>; 143 gpio-reserved-ranges = <0 4>, <81 4>; 144 145 sdc2-off-state { 146 clk-pins { 147 pins = "sdc2_clk"; 148 drive-strength = <2>; 149 bias-disable; 150 }; 151 152 cmd-pins { 153 pins = "sdc2_cmd"; 154 drive-strength = <2>; 155 bias-pull-up; 156 }; 157 158 data-pins { 159 pins = "sdc2_data"; 160 drive-strength = <2>; 161 bias-pull-up; 162 }; 163 }; 164 165 sdc2-cd-state { 166 pins = "gpio95"; 167 function = "gpio"; 168 bias-pull-up; 169 drive-strength = <2>; 170 }; 171 }; 172