1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/pinctrl/qcom,msm8976-pinctrl.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Qualcomm MSM8976 TLMM pin controller
8
9maintainers:
10  - Bjorn Andersson <andersson@kernel.org>
11  - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
12
13description:
14  Top Level Mode Multiplexer pin controller in Qualcomm MSM8976 SoC.
15
16properties:
17  compatible:
18    const: qcom,msm8976-pinctrl
19
20  reg:
21    maxItems: 1
22
23  interrupts: true
24  interrupt-controller: true
25  "#interrupt-cells": true
26  gpio-controller: true
27  "#gpio-cells": true
28  gpio-ranges: true
29  wakeup-parent: true
30
31  gpio-reserved-ranges:
32    minItems: 1
33    maxItems: 73
34
35  gpio-line-names:
36    maxItems: 145
37
38patternProperties:
39  "-state$":
40    oneOf:
41      - $ref: "#/$defs/qcom-msm8976-tlmm-state"
42      - patternProperties:
43          "-pins$":
44            $ref: "#/$defs/qcom-msm8976-tlmm-state"
45        additionalProperties: false
46
47$defs:
48  qcom-msm8976-tlmm-state:
49    type: object
50    description:
51      Desired pin configuration for a device or its specific state (like sleep
52      or active).
53    $ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state
54
55    properties:
56      pins:
57        description:
58          List of gpio pins affected by the properties specified in this state.
59        items:
60          oneOf:
61            - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-3][0-9]|14[0-4])$"
62            - enum: [ qdsd_clk, qdsd_cmd, qdsd_data0, qdsd_data1, qdsd_data2,
63                      qdsd_data3, sdc1_clk, sdc1_cmd, sdc1_data, sdc1_rclk,
64                      sdc2_clk, sdc2_cmd, sdc2_data ]
65        minItems: 1
66        maxItems: 36
67
68      function:
69        description:
70          Specify the alternative function to be configured for the specified
71          pins.
72
73        enum: [ gpio, blsp_uart1, blsp_spi1, smb_int, blsp_i2c1, blsp_spi2,
74                blsp_uart2, blsp_i2c2, gcc_gp1_clk_b, blsp_spi3,
75                qdss_tracedata_b, blsp_i2c3, gcc_gp2_clk_b, gcc_gp3_clk_b,
76                blsp_spi4, cap_int, blsp_i2c4, blsp_spi5, blsp_uart5,
77                qdss_traceclk_a, m_voc, blsp_i2c5, qdss_tracectl_a,
78                qdss_tracedata_a, blsp_spi6, blsp_uart6, qdss_tracectl_b,
79                blsp_i2c6, qdss_traceclk_b, mdp_vsync, pri_mi2s_mclk_a,
80                sec_mi2s_mclk_a, cam_mclk, cci0_i2c, cci1_i2c, blsp1_spi,
81                blsp3_spi, gcc_gp1_clk_a, gcc_gp2_clk_a, gcc_gp3_clk_a,
82                uim_batt, sd_write, uim1_data, uim1_clk, uim1_reset,
83                uim1_present, uim2_data, uim2_clk, uim2_reset, uim2_present,
84                ts_xvdd, mipi_dsi0, us_euro, ts_resout, ts_sample,
85                sec_mi2s_mclk_b, pri_mi2s, codec_reset, cdc_pdm0, us_emitter,
86                pri_mi2s_mclk_b, pri_mi2s_mclk_c, lpass_slimbus,
87                lpass_slimbus0, lpass_slimbus1, codec_int1, codec_int2,
88                wcss_bt, sdc3, wcss_wlan2, wcss_wlan1, wcss_wlan0, wcss_wlan,
89                wcss_fm, key_volp, key_snapshot, key_focus, key_home, pwr_down,
90                dmic0_clk, hdmi_int, dmic0_data, wsa_vi, wsa_en, blsp_spi8,
91                wsa_irq, blsp_i2c8, pa_indicator, modem_tsync, ssbi_wtr1,
92                gsm1_tx, gsm0_tx, sdcard_det, sec_mi2s, ss_switch ]
93
94      bias-pull-down: true
95      bias-pull-up: true
96      bias-disable: true
97      drive-strength: true
98      input-enable: true
99      output-high: true
100      output-low: true
101
102    required:
103      - pins
104
105    additionalProperties: false
106
107allOf:
108  - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#
109
110required:
111  - compatible
112  - reg
113
114additionalProperties: false
115
116examples:
117  - |
118    #include <dt-bindings/interrupt-controller/arm-gic.h>
119
120    tlmm: pinctrl@1000000 {
121        compatible = "qcom,msm8976-pinctrl";
122        reg = <0x1000000 0x300000>;
123        #gpio-cells = <2>;
124        gpio-controller;
125        gpio-ranges = <&tlmm 0 0 145>;
126        interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
127        interrupt-controller;
128        #interrupt-cells = <2>;
129
130        blsp1-uart2-active-state {
131            pins = "gpio4", "gpio5", "gpio6", "gpio7";
132            function = "blsp_uart2";
133            drive-strength = <2>;
134            bias-disable;
135        };
136    };
137