1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/pinctrl/qcom,msm8976-pinctrl.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Qualcomm MSM8976 TLMM pin controller
8
9maintainers:
10  - Bjorn Andersson <andersson@kernel.org>
11  - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
12
13description:
14  Top Level Mode Multiplexer pin controller in Qualcomm MSM8976 SoC.
15
16properties:
17  compatible:
18    const: qcom,msm8976-pinctrl
19
20  reg:
21    maxItems: 1
22
23  interrupts:
24    maxItems: 1
25
26  interrupt-controller: true
27  "#interrupt-cells": true
28  gpio-controller: true
29  "#gpio-cells": true
30  gpio-ranges: true
31  wakeup-parent: true
32
33  gpio-reserved-ranges:
34    minItems: 1
35    maxItems: 73
36
37  gpio-line-names:
38    maxItems: 145
39
40patternProperties:
41  "-state$":
42    oneOf:
43      - $ref: "#/$defs/qcom-msm8976-tlmm-state"
44      - patternProperties:
45          "-pins$":
46            $ref: "#/$defs/qcom-msm8976-tlmm-state"
47        additionalProperties: false
48
49$defs:
50  qcom-msm8976-tlmm-state:
51    type: object
52    description:
53      Desired pin configuration for a device or its specific state (like sleep
54      or active).
55    $ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state
56
57    properties:
58      pins:
59        description:
60          List of gpio pins affected by the properties specified in this state.
61        items:
62          oneOf:
63            - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-3][0-9]|14[0-4])$"
64            - enum: [ qdsd_clk, qdsd_cmd, qdsd_data0, qdsd_data1, qdsd_data2,
65                      qdsd_data3, sdc1_clk, sdc1_cmd, sdc1_data, sdc1_rclk,
66                      sdc2_clk, sdc2_cmd, sdc2_data ]
67        minItems: 1
68        maxItems: 36
69
70      function:
71        description:
72          Specify the alternative function to be configured for the specified
73          pins.
74
75        enum: [ gpio, blsp_uart1, blsp_spi1, smb_int, blsp_i2c1, blsp_spi2,
76                blsp_uart2, blsp_i2c2, gcc_gp1_clk_b, blsp_spi3,
77                qdss_tracedata_b, blsp_i2c3, gcc_gp2_clk_b, gcc_gp3_clk_b,
78                blsp_spi4, cap_int, blsp_i2c4, blsp_spi5, blsp_uart5,
79                qdss_traceclk_a, m_voc, blsp_i2c5, qdss_tracectl_a,
80                qdss_tracedata_a, blsp_spi6, blsp_uart6, qdss_tracectl_b,
81                blsp_i2c6, qdss_traceclk_b, mdp_vsync, pri_mi2s_mclk_a,
82                sec_mi2s_mclk_a, cam_mclk, cci0_i2c, cci1_i2c, blsp1_spi,
83                blsp3_spi, gcc_gp1_clk_a, gcc_gp2_clk_a, gcc_gp3_clk_a,
84                uim_batt, sd_write, uim1_data, uim1_clk, uim1_reset,
85                uim1_present, uim2_data, uim2_clk, uim2_reset, uim2_present,
86                ts_xvdd, mipi_dsi0, us_euro, ts_resout, ts_sample,
87                sec_mi2s_mclk_b, pri_mi2s, codec_reset, cdc_pdm0, us_emitter,
88                pri_mi2s_mclk_b, pri_mi2s_mclk_c, lpass_slimbus,
89                lpass_slimbus0, lpass_slimbus1, codec_int1, codec_int2,
90                wcss_bt, sdc3, wcss_wlan2, wcss_wlan1, wcss_wlan0, wcss_wlan,
91                wcss_fm, key_volp, key_snapshot, key_focus, key_home, pwr_down,
92                dmic0_clk, hdmi_int, dmic0_data, wsa_vi, wsa_en, blsp_spi8,
93                wsa_irq, blsp_i2c8, pa_indicator, modem_tsync, ssbi_wtr1,
94                gsm1_tx, gsm0_tx, sdcard_det, sec_mi2s, ss_switch ]
95
96      bias-pull-down: true
97      bias-pull-up: true
98      bias-disable: true
99      drive-strength: true
100      input-enable: true
101      output-high: true
102      output-low: true
103
104    required:
105      - pins
106
107    additionalProperties: false
108
109allOf:
110  - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#
111
112required:
113  - compatible
114  - reg
115
116additionalProperties: false
117
118examples:
119  - |
120    #include <dt-bindings/interrupt-controller/arm-gic.h>
121
122    tlmm: pinctrl@1000000 {
123        compatible = "qcom,msm8976-pinctrl";
124        reg = <0x1000000 0x300000>;
125        #gpio-cells = <2>;
126        gpio-controller;
127        gpio-ranges = <&tlmm 0 0 145>;
128        interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
129        interrupt-controller;
130        #interrupt-cells = <2>;
131
132        blsp1-uart2-active-state {
133            pins = "gpio4", "gpio5", "gpio6", "gpio7";
134            function = "blsp_uart2";
135            drive-strength = <2>;
136            bias-disable;
137        };
138    };
139