1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/pinctrl/qcom,msm8974-pinctrl.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Qualcomm MSM8974 TLMM pin controller
8
9maintainers:
10  - Bjorn Andersson <andersson@kernel.org>
11  - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
12
13description:
14  Top Level Mode Multiplexer pin controller in Qualcomm MSM8974 SoC.
15
16properties:
17  compatible:
18    const: qcom,msm8974-pinctrl
19
20  reg:
21    maxItems: 1
22
23  interrupts: true
24  interrupt-controller: true
25  "#interrupt-cells": true
26  gpio-controller: true
27  "#gpio-cells": true
28  gpio-ranges: true
29  wakeup-parent: true
30
31  gpio-reserved-ranges:
32    minItems: 1
33    maxItems: 73
34
35  gpio-line-names:
36    maxItems: 146
37
38patternProperties:
39  "-state$":
40    oneOf:
41      - $ref: "#/$defs/qcom-msm8974-tlmm-state"
42      - patternProperties:
43          "-pins$":
44            $ref: "#/$defs/qcom-msm8974-tlmm-state"
45        additionalProperties: false
46
47$defs:
48  qcom-msm8974-tlmm-state:
49    type: object
50    description:
51      Pinctrl node's client devices use subnodes for desired pin configuration.
52      Client device subnodes use below standard properties.
53    $ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state
54
55    properties:
56      pins:
57        description:
58          List of gpio pins affected by the properties specified in this
59          subnode.
60        items:
61          oneOf:
62            - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-3][0-9]|14[0-5])$"
63            - enum: [ hsic_data, hsic_strobe, sdc1_clk, sdc1_cmd, sdc1_data,
64                      sdc2_clk, sdc2_cmd, sdc2_data ]
65        minItems: 1
66        maxItems: 36
67
68      function:
69        description:
70          Specify the alternative function to be configured for the specified
71          pins.
72
73        enum: [ gpio, cci_i2c0, cci_i2c1, uim1, uim2, uim_batt_alarm,
74                blsp_uim1, blsp_uart1, blsp_i2c1, blsp_spi1, blsp_uim2,
75                blsp_uart2, blsp_i2c2, blsp_spi2, blsp_uim3, blsp_uart3,
76                blsp_i2c3, blsp_spi3, blsp_uim4, blsp_uart4, blsp_i2c4,
77                blsp_spi4, blsp_uim5, blsp_uart5, blsp_i2c5, blsp_spi5,
78                blsp_uim6, blsp_uart6, blsp_i2c6, blsp_spi6, blsp_uim7,
79                blsp_uart7, blsp_i2c7, blsp_spi7, blsp_uim8, blsp_uart8,
80                blsp_i2c8, blsp_spi8, blsp_uim9, blsp_uart9, blsp_i2c9,
81                blsp_spi9, blsp_uim10, blsp_uart10, blsp_i2c10, blsp_spi10,
82                blsp_uim11, blsp_uart11, blsp_i2c11, blsp_spi11, blsp_uim12,
83                blsp_uart12, blsp_i2c12, blsp_spi12, blsp_spi1_cs1,
84                blsp_spi2_cs2, blsp_spi_cs3, blsp_spi2_cs1, blsp_spi2_cs2
85                blsp_spi2_cs3, blsp_spi10_cs1, blsp_spi10_cs2, blsp_spi10_cs3,
86                sdc3, sdc4, gcc_gp_clk1, gcc_gp_clk2, gcc_gp_clk3, cci_timer0,
87                cci_timer1, cci_timer2, cci_timer3, cci_async_in0,
88                cci_async_in1, cci_async_in2, cam_mckl0, cam_mclk1, cam_mclk2,
89                cam_mclk3, mdp_vsync, hdmi_cec, hdmi_ddc, hdmi_hpd, edp_hpd,
90                gp_pdm0, gp_pdm1, gp_pdm2, gp_pdm3, gp0_clk, gp1_clk, gp_mn,
91                tsif1, tsif2, hsic, grfc, audio_ref_clk, qua_mi2s, pri_mi2s,
92                spkr_mi2s, ter_mi2s, sec_mi2s, bt, fm, wlan, slimbus, hsic_ctl ]
93
94      bias-pull-down: true
95      bias-pull-up: true
96      bias-disable: true
97      drive-strength: true
98      input-enable: true
99      output-high: true
100      output-low: true
101
102    required:
103      - pins
104
105    allOf:
106      - if:
107          properties:
108            pins:
109              contains:
110                enum:
111                  - hsic_data
112                  - hsic_strobe
113          required:
114            - pins
115        then:
116          properties:
117            bias-pull-down: false
118            bias-pull-up: false
119            bias-disable: false
120            drive-strength: false
121            input-enable: false
122            output-high: false
123            output-low: false
124
125    additionalProperties: false
126
127allOf:
128  - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#
129
130required:
131  - compatible
132  - reg
133
134additionalProperties: false
135
136examples:
137  - |
138    #include <dt-bindings/interrupt-controller/arm-gic.h>
139    tlmm: pinctrl@fd510000 {
140        compatible = "qcom,msm8974-pinctrl";
141        reg = <0xfd510000 0x4000>;
142        gpio-controller;
143        gpio-ranges = <&tlmm 0 0 146>;
144        #gpio-cells = <2>;
145        interrupt-controller;
146        #interrupt-cells = <2>;
147        interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
148
149        sdc1-off-state {
150            clk-pins {
151                pins = "sdc1_clk";
152                bias-disable;
153                drive-strength = <2>;
154            };
155
156            cmd-pins {
157                pins = "sdc1_cmd";
158                bias-pull-up;
159                drive-strength = <2>;
160            };
161
162            data-pins {
163                pins = "sdc1_data";
164                bias-pull-up;
165                drive-strength = <2>;
166            };
167        };
168
169        blsp2-uart1-sleep-state {
170            pins = "gpio41", "gpio42", "gpio43", "gpio44";
171            function = "gpio";
172            drive-strength = <2>;
173            bias-pull-down;
174        };
175
176        hsic-state {
177            pins = "hsic_data", "hsic_strobe";
178        };
179    };
180