1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/pinctrl/qcom,msm8974-pinctrl.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Qualcomm MSM8974 TLMM pin controller
8
9maintainers:
10  - Bjorn Andersson <andersson@kernel.org>
11  - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
12
13description:
14  Top Level Mode Multiplexer pin controller in Qualcomm MSM8974 SoC.
15
16properties:
17  compatible:
18    const: qcom,msm8974-pinctrl
19
20  reg:
21    maxItems: 1
22
23  interrupts:
24    maxItems: 1
25
26  interrupt-controller: true
27  "#interrupt-cells": true
28  gpio-controller: true
29  "#gpio-cells": true
30  gpio-ranges: true
31  wakeup-parent: true
32
33  gpio-reserved-ranges:
34    minItems: 1
35    maxItems: 73
36
37  gpio-line-names:
38    maxItems: 146
39
40patternProperties:
41  "-state$":
42    oneOf:
43      - $ref: "#/$defs/qcom-msm8974-tlmm-state"
44      - patternProperties:
45          "-pins$":
46            $ref: "#/$defs/qcom-msm8974-tlmm-state"
47        additionalProperties: false
48
49$defs:
50  qcom-msm8974-tlmm-state:
51    type: object
52    description:
53      Pinctrl node's client devices use subnodes for desired pin configuration.
54      Client device subnodes use below standard properties.
55    $ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state
56
57    properties:
58      pins:
59        description:
60          List of gpio pins affected by the properties specified in this
61          subnode.
62        items:
63          oneOf:
64            - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-3][0-9]|14[0-5])$"
65            - enum: [ hsic_data, hsic_strobe, sdc1_clk, sdc1_cmd, sdc1_data,
66                      sdc2_clk, sdc2_cmd, sdc2_data ]
67        minItems: 1
68        maxItems: 36
69
70      function:
71        description:
72          Specify the alternative function to be configured for the specified
73          pins.
74
75        enum: [ gpio, cci_i2c0, cci_i2c1, uim1, uim2, uim_batt_alarm,
76                blsp_uim1, blsp_uart1, blsp_i2c1, blsp_spi1, blsp_uim2,
77                blsp_uart2, blsp_i2c2, blsp_spi2, blsp_uim3, blsp_uart3,
78                blsp_i2c3, blsp_spi3, blsp_uim4, blsp_uart4, blsp_i2c4,
79                blsp_spi4, blsp_uim5, blsp_uart5, blsp_i2c5, blsp_spi5,
80                blsp_uim6, blsp_uart6, blsp_i2c6, blsp_spi6, blsp_uim7,
81                blsp_uart7, blsp_i2c7, blsp_spi7, blsp_uim8, blsp_uart8,
82                blsp_i2c8, blsp_spi8, blsp_uim9, blsp_uart9, blsp_i2c9,
83                blsp_spi9, blsp_uim10, blsp_uart10, blsp_i2c10, blsp_spi10,
84                blsp_uim11, blsp_uart11, blsp_i2c11, blsp_spi11, blsp_uim12,
85                blsp_uart12, blsp_i2c12, blsp_spi12, blsp_spi1_cs1,
86                blsp_spi2_cs2, blsp_spi_cs3, blsp_spi2_cs1, blsp_spi2_cs2
87                blsp_spi2_cs3, blsp_spi10_cs1, blsp_spi10_cs2, blsp_spi10_cs3,
88                sdc3, sdc4, gcc_gp_clk1, gcc_gp_clk2, gcc_gp_clk3, cci_timer0,
89                cci_timer1, cci_timer2, cci_timer3, cci_async_in0,
90                cci_async_in1, cci_async_in2, cam_mckl0, cam_mclk1, cam_mclk2,
91                cam_mclk3, mdp_vsync, hdmi_cec, hdmi_ddc, hdmi_hpd, edp_hpd,
92                gp_pdm0, gp_pdm1, gp_pdm2, gp_pdm3, gp0_clk, gp1_clk, gp_mn,
93                tsif1, tsif2, hsic, grfc, audio_ref_clk, qua_mi2s, pri_mi2s,
94                spkr_mi2s, ter_mi2s, sec_mi2s, bt, fm, wlan, slimbus, hsic_ctl ]
95
96      bias-pull-down: true
97      bias-pull-up: true
98      bias-disable: true
99      drive-strength: true
100      input-enable: true
101      output-high: true
102      output-low: true
103
104    required:
105      - pins
106
107    allOf:
108      - if:
109          properties:
110            pins:
111              contains:
112                enum:
113                  - hsic_data
114                  - hsic_strobe
115          required:
116            - pins
117        then:
118          properties:
119            bias-pull-down: false
120            bias-pull-up: false
121            bias-disable: false
122            drive-strength: false
123            input-enable: false
124            output-high: false
125            output-low: false
126
127    additionalProperties: false
128
129allOf:
130  - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#
131
132required:
133  - compatible
134  - reg
135
136additionalProperties: false
137
138examples:
139  - |
140    #include <dt-bindings/interrupt-controller/arm-gic.h>
141    tlmm: pinctrl@fd510000 {
142        compatible = "qcom,msm8974-pinctrl";
143        reg = <0xfd510000 0x4000>;
144        gpio-controller;
145        gpio-ranges = <&tlmm 0 0 146>;
146        #gpio-cells = <2>;
147        interrupt-controller;
148        #interrupt-cells = <2>;
149        interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
150
151        sdc1-off-state {
152            clk-pins {
153                pins = "sdc1_clk";
154                bias-disable;
155                drive-strength = <2>;
156            };
157
158            cmd-pins {
159                pins = "sdc1_cmd";
160                bias-pull-up;
161                drive-strength = <2>;
162            };
163
164            data-pins {
165                pins = "sdc1_data";
166                bias-pull-up;
167                drive-strength = <2>;
168            };
169        };
170
171        blsp2-uart1-sleep-state {
172            pins = "gpio41", "gpio42", "gpio43", "gpio44";
173            function = "gpio";
174            drive-strength = <2>;
175            bias-pull-down;
176        };
177
178        hsic-state {
179            pins = "hsic_data", "hsic_strobe";
180        };
181    };
182