1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/pinctrl/qcom,msm8960-pinctrl.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Qualcomm MSM8960 TLMM pin controller 8 9maintainers: 10 - Bjorn Andersson <andersson@kernel.org> 11 - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> 12 13description: 14 Top Level Mode Multiplexer pin controller in Qualcomm MSM8960 SoC. 15 16properties: 17 compatible: 18 const: qcom,msm8960-pinctrl 19 20 reg: 21 maxItems: 1 22 23 interrupts: true 24 interrupt-controller: true 25 "#interrupt-cells": true 26 gpio-controller: true 27 "#gpio-cells": true 28 gpio-ranges: true 29 wakeup-parent: true 30 31 gpio-reserved-ranges: 32 minItems: 1 33 maxItems: 76 34 35 gpio-line-names: 36 maxItems: 152 37 38patternProperties: 39 "-state$": 40 oneOf: 41 - $ref: "#/$defs/qcom-msm8960-tlmm-state" 42 - patternProperties: 43 "-pins$": 44 $ref: "#/$defs/qcom-msm8960-tlmm-state" 45 additionalProperties: false 46 47$defs: 48 qcom-msm8960-tlmm-state: 49 type: object 50 description: 51 Pinctrl node's client devices use subnodes for desired pin configuration. 52 Client device subnodes use below standard properties. 53 $ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state 54 55 properties: 56 pins: 57 description: 58 List of gpio pins affected by the properties specified in this 59 subnode. 60 items: 61 oneOf: 62 - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-4][0-9]|15[0-1])$" 63 - enum: [ sdc1_clk, sdc1_cmd, sdc1_data, sdc3_clk, sdc3_cmd, 64 sdc3_data ] 65 minItems: 1 66 maxItems: 36 67 68 function: 69 description: 70 Specify the alternative function to be configured for the specified 71 pins. 72 73 enum: [ gpio, audio_pcm, bt, cam_mclk0, cam_mclk1, cam_mclk2, 74 codec_mic_i2s, codec_spkr_i2s, ext_gps, fm, gps_blanking, 75 gps_pps_in, gps_pps_out, gp_clk_0a, gp_clk_0b, gp_clk_1a, 76 gp_clk_1b, gp_clk_2a, gp_clk_2b, gp_mn, gp_pdm_0a, gp_pdm_0b, 77 gp_pdm_1a, gp_pdm_1b, gp_pdm_2a, gp_pdm_2b, gsbi1, 78 gsbi1_spi_cs1_n, gsbi1_spi_cs2a_n, gsbi1_spi_cs2b_n, 79 gsbi1_spi_cs3_n, gsbi2, gsbi2_spi_cs1_n, gsbi2_spi_cs2_n, 80 gsbi2_spi_cs3_n, gsbi3, gsbi4, gsbi4_3d_cam_i2c_l, 81 gsbi4_3d_cam_i2c_r, gsbi5, gsbi5_3d_cam_i2c_l, 82 gsbi5_3d_cam_i2c_r, gsbi6, gsbi7, gsbi8, gsbi9, gsbi10, gsbi11, 83 gsbi11_spi_cs1a_n, gsbi11_spi_cs1b_n, gsbi11_spi_cs2a_n, 84 gsbi11_spi_cs2b_n, gsbi11_spi_cs3_n, gsbi12, hdmi_cec, 85 hdmi_ddc_clock, hdmi_ddc_data, hdmi_hot_plug_detect, hsic, 86 mdp_vsync, mi2s, mic_i2s, pmb_clk, pmb_ext_ctrl, ps_hold, 87 rpm_wdog, sdc2, sdc4, sdc5, slimbus1, slimbus2, spkr_i2s, 88 ssbi1, ssbi2, ssbi_ext_gps, ssbi_pmic2, ssbi_qpa1, ssbi_ts, 89 tsif1, tsif2, ts_eoc, usb_fs1, usb_fs1_oe, usb_fs1_oe_n, 90 usb_fs2, usb_fs2_oe, usb_fs2_oe_n, vfe_camif_timer1_a, 91 vfe_camif_timer1_b, vfe_camif_timer2, vfe_camif_timer3_a, 92 vfe_camif_timer3_b, vfe_camif_timer4_a, vfe_camif_timer4_b, 93 vfe_camif_timer4_c, vfe_camif_timer5_a, vfe_camif_timer5_b, 94 vfe_camif_timer6_a, vfe_camif_timer6_b, vfe_camif_timer6_c, 95 vfe_camif_timer7_a, vfe_camif_timer7_b, vfe_camif_timer7_c, 96 wlan ] 97 98 bias-pull-down: true 99 bias-pull-up: true 100 bias-disable: true 101 drive-strength: true 102 input-enable: true 103 output-high: true 104 output-low: true 105 106 required: 107 - pins 108 109 additionalProperties: false 110 111allOf: 112 - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml# 113 114required: 115 - compatible 116 - reg 117 118additionalProperties: false 119 120examples: 121 - | 122 #include <dt-bindings/interrupt-controller/arm-gic.h> 123 124 msmgpio: pinctrl@800000 { 125 compatible = "qcom,msm8960-pinctrl"; 126 reg = <0x800000 0x4000>; 127 #gpio-cells = <2>; 128 gpio-controller; 129 gpio-ranges = <&msmgpio 0 0 152>; 130 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>; 131 interrupt-controller; 132 #interrupt-cells = <2>; 133 134 spi1-default-state { 135 mosi-pins { 136 pins = "gpio6"; 137 function = "gsbi1"; 138 drive-strength = <12>; 139 bias-disable; 140 }; 141 142 miso-pins { 143 pins = "gpio7"; 144 function = "gsbi1"; 145 drive-strength = <12>; 146 bias-disable; 147 }; 148 149 cs-pins { 150 pins = "gpio8"; 151 function = "gpio"; 152 drive-strength = <12>; 153 bias-disable; 154 output-low; 155 }; 156 157 clk-pins { 158 pins = "gpio9"; 159 function = "gsbi1"; 160 drive-strength = <12>; 161 bias-disable; 162 }; 163 }; 164 }; 165