1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/pinctrl/qcom,msm8660-pinctrl.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Qualcomm MSM8660 TLMM pin controller
8
9maintainers:
10  - Bjorn Andersson <andersson@kernel.org>
11  - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
12
13description:
14  Top Level Mode Multiplexer pin controller in Qualcomm MSM8660 SoC.
15
16properties:
17  compatible:
18    const: qcom,msm8660-pinctrl
19
20  reg:
21    maxItems: 1
22
23  interrupts: true
24  interrupt-controller: true
25  "#interrupt-cells": true
26  gpio-controller: true
27  "#gpio-cells": true
28  gpio-ranges: true
29  wakeup-parent: true
30
31  gpio-reserved-ranges:
32    minItems: 1
33    maxItems: 86
34
35  gpio-line-names:
36    maxItems: 173
37
38patternProperties:
39  "-state$":
40    oneOf:
41      - $ref: "#/$defs/qcom-msm8660-tlmm-state"
42      - patternProperties:
43          "-pins$":
44            $ref: "#/$defs/qcom-msm8660-tlmm-state"
45        additionalProperties: false
46
47$defs:
48  qcom-msm8660-tlmm-state:
49    type: object
50    description:
51      Pinctrl node's client devices use subnodes for desired pin configuration.
52      Client device subnodes use below standard properties.
53    $ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state
54
55    properties:
56      pins:
57        description:
58          List of gpio pins affected by the properties specified in this
59          subnode.
60        items:
61          oneOf:
62            - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-6][0-9]|17[0-2])$"
63            - enum: [ sdc3_clk, sdc3_cmd, sdc3_data, sdc4_clk, sdc4_cmd, sdc4_data ]
64        minItems: 1
65        maxItems: 36
66
67      function:
68        description:
69          Specify the alternative function to be configured for the specified
70          pins.
71
72        enum: [ gpio, cam_mclk, dsub, ext_gps, gp_clk_0a, gp_clk_0b, gp_clk_1a,
73                gp_clk_1b, gp_clk_2a, gp_clk_2b, gp_mn, gsbi1, gsbi1_spi_cs1_n,
74                gsbi1_spi_cs2a_n, gsbi1_spi_cs2b_n, gsbi1_spi_cs3_n, gsbi2,
75                gsbi2_spi_cs1_n, gsbi2_spi_cs2_n, gsbi2_spi_cs3_n, gsbi3,
76                gsbi3_spi_cs1_n, gsbi3_spi_cs2_n, gsbi3_spi_cs3_n, gsbi4,
77                gsbi5, gsbi6, gsbi7, gsbi8, gsbi9, gsbi10, gsbi11, gsbi12,
78                hdmi, i2s, lcdc, mdp_vsync, mi2s, pcm, ps_hold, sdc1, sdc2,
79                sdc5, tsif1, tsif2, usb_fs1, usb_fs1_oe_n, usb_fs2,
80                usb_fs2_oe_n, vfe, vsens_alarm, ebi2, ebi2cs ]
81
82
83      bias-pull-down: true
84      bias-pull-up: true
85      bias-disable: true
86      drive-strength: true
87      input-enable: true
88      output-high: true
89      output-low: true
90
91    required:
92      - pins
93
94    additionalProperties: false
95
96allOf:
97  - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#
98
99required:
100  - compatible
101  - reg
102
103additionalProperties: false
104
105examples:
106  - |
107    #include <dt-bindings/interrupt-controller/arm-gic.h>
108    tlmm: pinctrl@800000 {
109        compatible = "qcom,msm8660-pinctrl";
110        reg = <0x800000 0x4000>;
111
112        gpio-controller;
113        gpio-ranges = <&tlmm 0 0 173>;
114        #gpio-cells = <2>;
115        interrupts = <0 16 0x4>;
116        interrupt-controller;
117        #interrupt-cells = <2>;
118
119        gsbi3-i2c-state {
120            pins = "gpio43", "gpio44";
121            function = "gsbi3";
122            drive-strength = <8>;
123            bias-disable;
124        };
125    };
126