1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/pinctrl/qcom,msm8660-pinctrl.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Qualcomm MSM8660 TLMM pin controller
8
9maintainers:
10  - Bjorn Andersson <andersson@kernel.org>
11  - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
12
13description:
14  Top Level Mode Multiplexer pin controller in Qualcomm MSM8660 SoC.
15
16properties:
17  compatible:
18    const: qcom,msm8660-pinctrl
19
20  reg:
21    maxItems: 1
22
23  interrupts:
24    maxItems: 1
25
26  interrupt-controller: true
27  "#interrupt-cells": true
28  gpio-controller: true
29  "#gpio-cells": true
30  gpio-ranges: true
31  wakeup-parent: true
32
33  gpio-reserved-ranges:
34    minItems: 1
35    maxItems: 86
36
37  gpio-line-names:
38    maxItems: 173
39
40patternProperties:
41  "-state$":
42    oneOf:
43      - $ref: "#/$defs/qcom-msm8660-tlmm-state"
44      - patternProperties:
45          "-pins$":
46            $ref: "#/$defs/qcom-msm8660-tlmm-state"
47        additionalProperties: false
48
49$defs:
50  qcom-msm8660-tlmm-state:
51    type: object
52    description:
53      Pinctrl node's client devices use subnodes for desired pin configuration.
54      Client device subnodes use below standard properties.
55    $ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state
56
57    properties:
58      pins:
59        description:
60          List of gpio pins affected by the properties specified in this
61          subnode.
62        items:
63          oneOf:
64            - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-6][0-9]|17[0-2])$"
65            - enum: [ sdc3_clk, sdc3_cmd, sdc3_data, sdc4_clk, sdc4_cmd, sdc4_data ]
66        minItems: 1
67        maxItems: 36
68
69      function:
70        description:
71          Specify the alternative function to be configured for the specified
72          pins.
73
74        enum: [ gpio, cam_mclk, dsub, ext_gps, gp_clk_0a, gp_clk_0b, gp_clk_1a,
75                gp_clk_1b, gp_clk_2a, gp_clk_2b, gp_mn, gsbi1, gsbi1_spi_cs1_n,
76                gsbi1_spi_cs2a_n, gsbi1_spi_cs2b_n, gsbi1_spi_cs3_n, gsbi2,
77                gsbi2_spi_cs1_n, gsbi2_spi_cs2_n, gsbi2_spi_cs3_n, gsbi3,
78                gsbi3_spi_cs1_n, gsbi3_spi_cs2_n, gsbi3_spi_cs3_n, gsbi4,
79                gsbi5, gsbi6, gsbi7, gsbi8, gsbi9, gsbi10, gsbi11, gsbi12,
80                hdmi, i2s, lcdc, mdp_vsync, mi2s, pcm, ps_hold, sdc1, sdc2,
81                sdc5, tsif1, tsif2, usb_fs1, usb_fs1_oe_n, usb_fs2,
82                usb_fs2_oe_n, vfe, vsens_alarm, ebi2, ebi2cs ]
83
84
85      bias-pull-down: true
86      bias-pull-up: true
87      bias-disable: true
88      drive-strength: true
89      input-enable: true
90      output-high: true
91      output-low: true
92
93    required:
94      - pins
95
96    additionalProperties: false
97
98allOf:
99  - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#
100
101required:
102  - compatible
103  - reg
104
105additionalProperties: false
106
107examples:
108  - |
109    #include <dt-bindings/interrupt-controller/arm-gic.h>
110    tlmm: pinctrl@800000 {
111        compatible = "qcom,msm8660-pinctrl";
112        reg = <0x800000 0x4000>;
113
114        gpio-controller;
115        gpio-ranges = <&tlmm 0 0 173>;
116        #gpio-cells = <2>;
117        interrupts = <0 16 0x4>;
118        interrupt-controller;
119        #interrupt-cells = <2>;
120
121        gsbi3-i2c-state {
122            pins = "gpio43", "gpio44";
123            function = "gsbi3";
124            drive-strength = <8>;
125            bias-disable;
126        };
127    };
128