1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/pinctrl/qcom,mdm9615-pinctrl.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Qualcomm Technologies, Inc. MDM9615 TLMM block
8
9maintainers:
10  - Bjorn Andersson <andersson@kernel.org>
11
12description: Top Level Mode Multiplexer pin controller in Qualcomm MDM9615 SoC.
13
14$ref: /schemas/pinctrl/qcom,tlmm-common.yaml#
15
16properties:
17  compatible:
18    const: qcom,mdm9615-pinctrl
19
20  reg:
21    maxItems: 1
22
23  interrupts:
24    maxItems: 1
25
26  interrupt-controller: true
27  '#interrupt-cells': true
28  gpio-controller: true
29  '#gpio-cells': true
30  gpio-ranges: true
31
32required:
33  - compatible
34  - reg
35
36additionalProperties: false
37
38patternProperties:
39  "-state$":
40    oneOf:
41      - $ref: "#/$defs/qcom-mdm9615-pinctrl-state"
42      - patternProperties:
43          "-pins$":
44            $ref: "#/$defs/qcom-mdm9615-pinctrl-state"
45        additionalProperties: false
46
47$defs:
48  qcom-mdm9615-pinctrl-state:
49    type: object
50    description:
51      Pinctrl node's client devices use subnodes for desired pin configuration.
52      Client device subnodes use below standard properties.
53    $ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state
54
55    properties:
56      pins:
57        description:
58          List of gpio pins affected by the properties specified in this
59          subnode.
60        items:
61          pattern: "^gpio([0-9]|[1-7][0-9]|8[0-7])$"
62        minItems: 1
63        maxItems: 16
64
65      function:
66        description:
67          Specify the alternative function to be configured for the specified
68          pins.
69
70        enum: [ gpio, gsbi2_i2c, gsbi3, gsbi4, gsbi5_i2c, gsbi5_uart,
71                sdc2, ebi2_lcdc, ps_hold, prim_audio, sec_audio, cdc_mclk, ]
72
73      bias-disable: true
74      bias-pull-down: true
75      bias-pull-up: true
76      drive-strength: true
77      output-high: true
78      output-low: true
79      input-enable: true
80
81    required:
82      - pins
83
84    additionalProperties: false
85
86examples:
87  - |
88    #include <dt-bindings/interrupt-controller/arm-gic.h>
89    tlmm: pinctrl@1000000 {
90      compatible = "qcom,mdm9615-pinctrl";
91      reg = <0x01000000 0x300000>;
92      interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
93      gpio-controller;
94      gpio-ranges = <&msmgpio 0 0 88>;
95      #gpio-cells = <2>;
96      interrupt-controller;
97      #interrupt-cells = <2>;
98
99      gsbi3-state {
100        pins = "gpio8", "gpio9", "gpio10", "gpio11";
101        function = "gsbi3";
102        drive-strength = <8>;
103        bias-disable;
104      };
105
106      gsbi5-i2c-state {
107        sda-pins {
108          pins = "gpio16";
109          function = "gsbi5_i2c";
110          drive-strength = <8>;
111          bias-disable;
112        };
113
114        scl-pins {
115          pins = "gpio17";
116          function = "gsbi5_i2c";
117          drive-strength = <2>;
118          bias-disable;
119        };
120      };
121    };
122