1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/pinctrl/qcom,mdm9615-pinctrl.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Qualcomm Technologies, Inc. MDM9615 TLMM block
8
9maintainers:
10  - Bjorn Andersson <andersson@kernel.org>
11
12description: Top Level Mode Multiplexer pin controller in Qualcomm MDM9615 SoC.
13
14$ref: /schemas/pinctrl/qcom,tlmm-common.yaml#
15
16properties:
17  compatible:
18    const: qcom,mdm9615-pinctrl
19
20  reg:
21    maxItems: 1
22
23  interrupts: true
24  interrupt-controller: true
25  '#interrupt-cells': true
26  gpio-controller: true
27  '#gpio-cells': true
28  gpio-ranges: true
29
30required:
31  - compatible
32  - reg
33
34additionalProperties: false
35
36patternProperties:
37  "-state$":
38    oneOf:
39      - $ref: "#/$defs/qcom-mdm9615-pinctrl-state"
40      - patternProperties:
41          "-pins$":
42            $ref: "#/$defs/qcom-mdm9615-pinctrl-state"
43        additionalProperties: false
44
45$defs:
46  qcom-mdm9615-pinctrl-state:
47    type: object
48    description:
49      Pinctrl node's client devices use subnodes for desired pin configuration.
50      Client device subnodes use below standard properties.
51    $ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state
52
53    properties:
54      pins:
55        description:
56          List of gpio pins affected by the properties specified in this
57          subnode.
58        items:
59          pattern: "^gpio([0-9]|[1-7][0-9]|8[0-7])$"
60        minItems: 1
61        maxItems: 16
62
63      function:
64        description:
65          Specify the alternative function to be configured for the specified
66          pins.
67
68        enum: [ gpio, gsbi2_i2c, gsbi3, gsbi4, gsbi5_i2c, gsbi5_uart,
69                sdc2, ebi2_lcdc, ps_hold, prim_audio, sec_audio, cdc_mclk, ]
70
71      bias-disable: true
72      bias-pull-down: true
73      bias-pull-up: true
74      drive-strength: true
75      output-high: true
76      output-low: true
77      input-enable: true
78
79    required:
80      - pins
81
82    additionalProperties: false
83
84examples:
85  - |
86    #include <dt-bindings/interrupt-controller/arm-gic.h>
87    tlmm: pinctrl@1000000 {
88      compatible = "qcom,mdm9615-pinctrl";
89      reg = <0x01000000 0x300000>;
90      interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
91      gpio-controller;
92      gpio-ranges = <&msmgpio 0 0 88>;
93      #gpio-cells = <2>;
94      interrupt-controller;
95      #interrupt-cells = <2>;
96
97      gsbi3-state {
98        pins = "gpio8", "gpio9", "gpio10", "gpio11";
99        function = "gsbi3";
100        drive-strength = <8>;
101        bias-disable;
102      };
103
104      gsbi5-i2c-state {
105        sda-pins {
106          pins = "gpio16";
107          function = "gsbi5_i2c";
108          drive-strength = <8>;
109          bias-disable;
110        };
111
112        scl-pins {
113          pins = "gpio17";
114          function = "gsbi5_i2c";
115          drive-strength = <2>;
116          bias-disable;
117        };
118      };
119    };
120