1*c82d4776SVinod Koul# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2*c82d4776SVinod Koul%YAML 1.2 3*c82d4776SVinod Koul--- 4*c82d4776SVinod Koul$id: http://devicetree.org/schemas/pinctrl/qcom,sdx55-pinctrl.yaml# 5*c82d4776SVinod Koul$schema: http://devicetree.org/meta-schemas/core.yaml# 6*c82d4776SVinod Koul 7*c82d4776SVinod Koultitle: Qualcomm Technologies, Inc. SDX55 TLMM block 8*c82d4776SVinod Koul 9*c82d4776SVinod Koulmaintainers: 10*c82d4776SVinod Koul - Vinod Koul <vkoul@kernel.org> 11*c82d4776SVinod Koul 12*c82d4776SVinod Kouldescription: | 13*c82d4776SVinod Koul This binding describes the Top Level Mode Multiplexer block found in the 14*c82d4776SVinod Koul SDX55 platform. 15*c82d4776SVinod Koul 16*c82d4776SVinod Koulproperties: 17*c82d4776SVinod Koul compatible: 18*c82d4776SVinod Koul const: qcom,sdx55-pinctrl 19*c82d4776SVinod Koul 20*c82d4776SVinod Koul reg: 21*c82d4776SVinod Koul description: Specifies the base address and size of the TLMM register space 22*c82d4776SVinod Koul maxItems: 1 23*c82d4776SVinod Koul 24*c82d4776SVinod Koul interrupts: 25*c82d4776SVinod Koul description: Specifies the TLMM summary IRQ 26*c82d4776SVinod Koul maxItems: 1 27*c82d4776SVinod Koul 28*c82d4776SVinod Koul interrupt-controller: true 29*c82d4776SVinod Koul 30*c82d4776SVinod Koul '#interrupt-cells': 31*c82d4776SVinod Koul description: Specifies the PIN numbers and Flags, as defined in 32*c82d4776SVinod Koul include/dt-bindings/interrupt-controller/irq.h 33*c82d4776SVinod Koul const: 2 34*c82d4776SVinod Koul 35*c82d4776SVinod Koul gpio-controller: true 36*c82d4776SVinod Koul 37*c82d4776SVinod Koul '#gpio-cells': 38*c82d4776SVinod Koul description: Specifying the pin number and flags, as defined in 39*c82d4776SVinod Koul include/dt-bindings/gpio/gpio.h 40*c82d4776SVinod Koul const: 2 41*c82d4776SVinod Koul 42*c82d4776SVinod Koul gpio-ranges: 43*c82d4776SVinod Koul maxItems: 1 44*c82d4776SVinod Koul 45*c82d4776SVinod Koul gpio-reserved-ranges: 46*c82d4776SVinod Koul maxItems: 1 47*c82d4776SVinod Koul 48*c82d4776SVinod Koul#PIN CONFIGURATION NODES 49*c82d4776SVinod KoulpatternProperties: 50*c82d4776SVinod Koul '-pins$': 51*c82d4776SVinod Koul type: object 52*c82d4776SVinod Koul description: 53*c82d4776SVinod Koul Pinctrl node's client devices use subnodes for desired pin configuration. 54*c82d4776SVinod Koul Client device subnodes use below standard properties. 55*c82d4776SVinod Koul $ref: "/schemas/pinctrl/pincfg-node.yaml" 56*c82d4776SVinod Koul 57*c82d4776SVinod Koul properties: 58*c82d4776SVinod Koul pins: 59*c82d4776SVinod Koul description: 60*c82d4776SVinod Koul List of gpio pins affected by the properties specified in this subnode. 61*c82d4776SVinod Koul items: 62*c82d4776SVinod Koul oneOf: 63*c82d4776SVinod Koul - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-1][0-6])$" 64*c82d4776SVinod Koul - enum: [ sdc1_clk, sdc1_cmd, sdc1_data, sdc2_clk, sdc2_cmd, sdc2_data ] 65*c82d4776SVinod Koul minItems: 1 66*c82d4776SVinod Koul maxItems: 36 67*c82d4776SVinod Koul 68*c82d4776SVinod Koul function: 69*c82d4776SVinod Koul description: 70*c82d4776SVinod Koul Specify the alternative function to be configured for the specified 71*c82d4776SVinod Koul pins. Functions are only valid for gpio pins. 72*c82d4776SVinod Koul enum: [ adsp_ext, atest, audio_ref, bimc_dte0, bimc_dte1, blsp_i2c1, 73*c82d4776SVinod Koul blsp_i2c2, blsp_i2c3, blsp_i2c4, blsp_spi1, blsp_spi2, 74*c82d4776SVinod Koul blsp_spi3, blsp_spi4, blsp_uart1, blsp_uart2, blsp_uart3, 75*c82d4776SVinod Koul blsp_uart4, char_exec, coex_uart, coex_uart2, cri_trng, 76*c82d4776SVinod Koul cri_trng0, cri_trng1, dbg_out, ddr_bist, ddr_pxi0, 77*c82d4776SVinod Koul ebi0_wrcdc, ebi2_a, ebi2_lcd, emac_gcc0, emac_gcc1, 78*c82d4776SVinod Koul emac_pps0, emac_pps1, ext_dbg, gcc_gp1, gcc_gp2, gcc_gp3, 79*c82d4776SVinod Koul gcc_plltest, gpio, i2s_mclk, jitter_bist, ldo_en, ldo_update, 80*c82d4776SVinod Koul mgpi_clk, m_voc, native_char, native_char0, native_char1, 81*c82d4776SVinod Koul native_char2, native_char3, native_tsens, native_tsense, 82*c82d4776SVinod Koul nav_gpio, pa_indicator, pcie_clkreq, pci_e, pll_bist, pll_ref, 83*c82d4776SVinod Koul pll_test, pri_mi2s, prng_rosc, qdss_cti, qdss_gpio, 84*c82d4776SVinod Koul qdss_gpio0, qdss_gpio1, qdss_gpio2, qdss_gpio3, qdss_gpio4, 85*c82d4776SVinod Koul qdss_gpio5, qdss_gpio6, qdss_gpio7, qdss_gpio8, qdss_gpio9, 86*c82d4776SVinod Koul qdss_gpio10, qdss_gpio11, qdss_gpio12, qdss_gpio13, 87*c82d4776SVinod Koul qdss_gpio14, qdss_gpio15, qdss_stm0, qdss_stm1, qdss_stm2, 88*c82d4776SVinod Koul qdss_stm3, qdss_stm4, qdss_stm5, qdss_stm6, qdss_stm7, 89*c82d4776SVinod Koul qdss_stm8, qdss_stm9, qdss_stm10, qdss_stm11, qdss_stm12, 90*c82d4776SVinod Koul qdss_stm13, qdss_stm14, qdss_stm15, qdss_stm16, qdss_stm17, 91*c82d4776SVinod Koul qdss_stm18, qdss_stm19, qdss_stm20, qdss_stm21, qdss_stm22, 92*c82d4776SVinod Koul qdss_stm23, qdss_stm24, qdss_stm25, qdss_stm26, qdss_stm27, 93*c82d4776SVinod Koul qdss_stm28, qdss_stm29, qdss_stm30, qdss_stm31, qlink0_en, 94*c82d4776SVinod Koul qlink0_req, qlink0_wmss, qlink1_en, qlink1_req, qlink1_wmss, 95*c82d4776SVinod Koul spmi_coex, sec_mi2s, spmi_vgi, tgu_ch0, uim1_clk, uim1_data, 96*c82d4776SVinod Koul uim1_present, uim1_reset, uim2_clk, uim2_data, uim2_present, 97*c82d4776SVinod Koul uim2_reset, usb2phy_ac, vsense_trigger ] 98*c82d4776SVinod Koul 99*c82d4776SVinod Koul drive-strength: 100*c82d4776SVinod Koul enum: [2, 4, 6, 8, 10, 12, 14, 16] 101*c82d4776SVinod Koul default: 2 102*c82d4776SVinod Koul description: 103*c82d4776SVinod Koul Selects the drive strength for the specified pins, in mA. 104*c82d4776SVinod Koul 105*c82d4776SVinod Koul bias-pull-down: true 106*c82d4776SVinod Koul 107*c82d4776SVinod Koul bias-pull-up: true 108*c82d4776SVinod Koul 109*c82d4776SVinod Koul bias-disable: true 110*c82d4776SVinod Koul 111*c82d4776SVinod Koul output-high: true 112*c82d4776SVinod Koul 113*c82d4776SVinod Koul output-low: true 114*c82d4776SVinod Koul 115*c82d4776SVinod Koul required: 116*c82d4776SVinod Koul - pins 117*c82d4776SVinod Koul - function 118*c82d4776SVinod Koul 119*c82d4776SVinod Koul additionalProperties: false 120*c82d4776SVinod Koul 121*c82d4776SVinod Koulrequired: 122*c82d4776SVinod Koul - compatible 123*c82d4776SVinod Koul - reg 124*c82d4776SVinod Koul - interrupts 125*c82d4776SVinod Koul - interrupt-controller 126*c82d4776SVinod Koul - '#interrupt-cells' 127*c82d4776SVinod Koul - gpio-controller 128*c82d4776SVinod Koul - '#gpio-cells' 129*c82d4776SVinod Koul - gpio-ranges 130*c82d4776SVinod Koul 131*c82d4776SVinod KouladditionalProperties: false 132*c82d4776SVinod Koul 133*c82d4776SVinod Koulexamples: 134*c82d4776SVinod Koul - | 135*c82d4776SVinod Koul #include <dt-bindings/interrupt-controller/arm-gic.h> 136*c82d4776SVinod Koul tlmm: pinctrl@1f00000 { 137*c82d4776SVinod Koul compatible = "qcom,sdx55-pinctrl"; 138*c82d4776SVinod Koul reg = <0x0f100000 0x300000>; 139*c82d4776SVinod Koul gpio-controller; 140*c82d4776SVinod Koul #gpio-cells = <2>; 141*c82d4776SVinod Koul gpio-ranges = <&tlmm 0 0 108>; 142*c82d4776SVinod Koul interrupt-controller; 143*c82d4776SVinod Koul #interrupt-cells = <2>; 144*c82d4776SVinod Koul interrupts = <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>; 145*c82d4776SVinod Koul 146*c82d4776SVinod Koul serial-pins { 147*c82d4776SVinod Koul pins = "gpio8", "gpio9"; 148*c82d4776SVinod Koul function = "blsp_uart3"; 149*c82d4776SVinod Koul drive-strength = <8>; 150*c82d4776SVinod Koul bias-disable; 151*c82d4776SVinod Koul }; 152*c82d4776SVinod Koul }; 153*c82d4776SVinod Koul 154*c82d4776SVinod Koul... 155