1*5913f635SRajendra Nayak# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2*5913f635SRajendra Nayak%YAML 1.2 3*5913f635SRajendra Nayak--- 4*5913f635SRajendra Nayak$id: http://devicetree.org/schemas/pinctrl/qcom,sc7280-pinctrl.yaml# 5*5913f635SRajendra Nayak$schema: http://devicetree.org/meta-schemas/core.yaml# 6*5913f635SRajendra Nayak 7*5913f635SRajendra Nayaktitle: Qualcomm Technologies, Inc. SC7280 TLMM block 8*5913f635SRajendra Nayak 9*5913f635SRajendra Nayakmaintainers: 10*5913f635SRajendra Nayak - Rajendra Nayak <rnayak@codeaurora.org> 11*5913f635SRajendra Nayak 12*5913f635SRajendra Nayakdescription: | 13*5913f635SRajendra Nayak This binding describes the Top Level Mode Multiplexer block found in the 14*5913f635SRajendra Nayak SC7280 platform. 15*5913f635SRajendra Nayak 16*5913f635SRajendra Nayakproperties: 17*5913f635SRajendra Nayak compatible: 18*5913f635SRajendra Nayak const: qcom,sc7280-pinctrl 19*5913f635SRajendra Nayak 20*5913f635SRajendra Nayak reg: 21*5913f635SRajendra Nayak maxItems: 1 22*5913f635SRajendra Nayak 23*5913f635SRajendra Nayak interrupts: 24*5913f635SRajendra Nayak description: Specifies the TLMM summary IRQ 25*5913f635SRajendra Nayak maxItems: 1 26*5913f635SRajendra Nayak 27*5913f635SRajendra Nayak interrupt-controller: true 28*5913f635SRajendra Nayak 29*5913f635SRajendra Nayak '#interrupt-cells': 30*5913f635SRajendra Nayak description: 31*5913f635SRajendra Nayak Specifies the PIN numbers and Flags, as defined in defined in 32*5913f635SRajendra Nayak include/dt-bindings/interrupt-controller/irq.h 33*5913f635SRajendra Nayak const: 2 34*5913f635SRajendra Nayak 35*5913f635SRajendra Nayak gpio-controller: true 36*5913f635SRajendra Nayak 37*5913f635SRajendra Nayak '#gpio-cells': 38*5913f635SRajendra Nayak description: Specifying the pin number and flags, as defined in 39*5913f635SRajendra Nayak include/dt-bindings/gpio/gpio.h 40*5913f635SRajendra Nayak const: 2 41*5913f635SRajendra Nayak 42*5913f635SRajendra Nayak gpio-ranges: 43*5913f635SRajendra Nayak maxItems: 1 44*5913f635SRajendra Nayak 45*5913f635SRajendra Nayak wakeup-parent: 46*5913f635SRajendra Nayak maxItems: 1 47*5913f635SRajendra Nayak 48*5913f635SRajendra Nayak#PIN CONFIGURATION NODES 49*5913f635SRajendra NayakpatternProperties: 50*5913f635SRajendra Nayak '-pins$': 51*5913f635SRajendra Nayak type: object 52*5913f635SRajendra Nayak description: 53*5913f635SRajendra Nayak Pinctrl node's client devices use subnodes for desired pin configuration. 54*5913f635SRajendra Nayak Client device subnodes use below standard properties. 55*5913f635SRajendra Nayak $ref: "/schemas/pinctrl/pincfg-node.yaml" 56*5913f635SRajendra Nayak 57*5913f635SRajendra Nayak properties: 58*5913f635SRajendra Nayak pins: 59*5913f635SRajendra Nayak description: 60*5913f635SRajendra Nayak List of gpio pins affected by the properties specified in this 61*5913f635SRajendra Nayak subnode. 62*5913f635SRajendra Nayak items: 63*5913f635SRajendra Nayak oneOf: 64*5913f635SRajendra Nayak - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-7][0-4])$" 65*5913f635SRajendra Nayak - enum: [ sdc1_rclk, sdc1_clk, sdc1_cmd, sdc1_data, sdc2_clk, 66*5913f635SRajendra Nayak sdc2_cmd, sdc2_data, ufs_reset ] 67*5913f635SRajendra Nayak minItems: 1 68*5913f635SRajendra Nayak maxItems: 16 69*5913f635SRajendra Nayak 70*5913f635SRajendra Nayak function: 71*5913f635SRajendra Nayak description: 72*5913f635SRajendra Nayak Specify the alternative function to be configured for the specified 73*5913f635SRajendra Nayak pins. 74*5913f635SRajendra Nayak 75*5913f635SRajendra Nayak enum: [ atest_char, atest_char0, atest_char1, atest_char2, 76*5913f635SRajendra Nayak atest_char3, atest_usb0, atest_usb00, atest_usb01, 77*5913f635SRajendra Nayak atest_usb02, atest_usb03, atest_usb1, atest_usb10, 78*5913f635SRajendra Nayak atest_usb11, atest_usb12, atest_usb13, audio_ref, 79*5913f635SRajendra Nayak cam_mclk, cci_async, cci_i2c, cci_timer0, cci_timer1, 80*5913f635SRajendra Nayak cci_timer2, cci_timer3, cci_timer4, cmu_rng0, cmu_rng1, 81*5913f635SRajendra Nayak cmu_rng2, cmu_rng3, coex_uart1, cri_trng, cri_trng0, 82*5913f635SRajendra Nayak cri_trng1, dbg_out, ddr_bist, ddr_pxi0, ddr_pxi1, dp_hot, 83*5913f635SRajendra Nayak dp_lcd, edp_hot, edp_lcd, gcc_gp1, gcc_gp2, gcc_gp3, 84*5913f635SRajendra Nayak gpio, host2wlan_sol, ibi_i3c, jitter_bist, lpass_slimbus, 85*5913f635SRajendra Nayak mdp_vsync, mdp_vsync0, mdp_vsync1, mdp_vsync2, mdp_vsync3, 86*5913f635SRajendra Nayak mdp_vsync4, mdp_vsync5, mi2s0_data0, mi2s0_data1, mi2s0_sck, 87*5913f635SRajendra Nayak mi2s0_ws, mi2s1_data0, mi2s1_data1, mi2s1_sck, mi2s1_ws, 88*5913f635SRajendra Nayak mi2s2_data0, mi2s2_data1, mi2s2_sck, mi2s2_ws, mss_grfc0, 89*5913f635SRajendra Nayak mss_grfc1, mss_grfc10, mss_grfc11, mss_grfc12, mss_grfc2, 90*5913f635SRajendra Nayak mss_grfc3, mss_grfc4, mss_grfc5, mss_grfc6, mss_grfc7, 91*5913f635SRajendra Nayak mss_grfc8, mss_grfc9, nav_gpio0, nav_gpio1, nav_gpio2, 92*5913f635SRajendra Nayak pa_indicator, pcie0_clkreqn, pcie1_clkreqn, phase_flag, 93*5913f635SRajendra Nayak pll_bist, pll_bypassnl, pll_clk, pll_reset, pri_mi2s, prng_rosc, 94*5913f635SRajendra Nayak qdss, qdss_cti, qlink0_enable, qlink0_request, qlink0_wmss, 95*5913f635SRajendra Nayak qlink1_enable, qlink1_request, qlink1_wmss, qspi_clk, qspi_cs, 96*5913f635SRajendra Nayak qspi_data, qup00, qup01, qup02, qup03, qup04, qup05, qup06, qup07, 97*5913f635SRajendra Nayak qup10, qup11, qup12, qup13, qup14, qup15, qup16, qup17, 98*5913f635SRajendra Nayak sdc40, sdc41, sdc42, sdc43, sdc4_clk, sdc4_cmd, sd_write, 99*5913f635SRajendra Nayak sec_mi2s, tb_trig, tgu_ch0, tgu_ch1, tsense_pwm1, 100*5913f635SRajendra Nayak tsense_pwm2, uim0_clk, uim0_data, uim0_present, uim0_reset, 101*5913f635SRajendra Nayak uim1_clk, uim1_data, uim1_present, uim1_reset, usb2phy_ac, 102*5913f635SRajendra Nayak usb_phy, vfr_0, vfr_1, vsense_trigger ] 103*5913f635SRajendra Nayak 104*5913f635SRajendra Nayak drive-strength: 105*5913f635SRajendra Nayak enum: [2, 4, 6, 8, 10, 12, 14, 16] 106*5913f635SRajendra Nayak default: 2 107*5913f635SRajendra Nayak description: 108*5913f635SRajendra Nayak Selects the drive strength for the specified pins, in mA. 109*5913f635SRajendra Nayak 110*5913f635SRajendra Nayak bias-pull-down: true 111*5913f635SRajendra Nayak 112*5913f635SRajendra Nayak bias-pull-up: true 113*5913f635SRajendra Nayak 114*5913f635SRajendra Nayak bias-disable: true 115*5913f635SRajendra Nayak 116*5913f635SRajendra Nayak output-high: true 117*5913f635SRajendra Nayak 118*5913f635SRajendra Nayak output-low: true 119*5913f635SRajendra Nayak 120*5913f635SRajendra Nayak required: 121*5913f635SRajendra Nayak - pins 122*5913f635SRajendra Nayak - function 123*5913f635SRajendra Nayak 124*5913f635SRajendra Nayak additionalProperties: false 125*5913f635SRajendra Nayak 126*5913f635SRajendra Nayakrequired: 127*5913f635SRajendra Nayak - compatible 128*5913f635SRajendra Nayak - reg 129*5913f635SRajendra Nayak - interrupts 130*5913f635SRajendra Nayak - interrupt-controller 131*5913f635SRajendra Nayak - '#interrupt-cells' 132*5913f635SRajendra Nayak - gpio-controller 133*5913f635SRajendra Nayak - '#gpio-cells' 134*5913f635SRajendra Nayak - gpio-ranges 135*5913f635SRajendra Nayak 136*5913f635SRajendra NayakadditionalProperties: false 137*5913f635SRajendra Nayak 138*5913f635SRajendra Nayakexamples: 139*5913f635SRajendra Nayak - | 140*5913f635SRajendra Nayak #include <dt-bindings/interrupt-controller/arm-gic.h> 141*5913f635SRajendra Nayak tlmm: pinctrl@f000000 { 142*5913f635SRajendra Nayak compatible = "qcom,sc7280-pinctrl"; 143*5913f635SRajendra Nayak reg = <0xf000000 0x1000000>; 144*5913f635SRajendra Nayak interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>; 145*5913f635SRajendra Nayak gpio-controller; 146*5913f635SRajendra Nayak #gpio-cells = <2>; 147*5913f635SRajendra Nayak interrupt-controller; 148*5913f635SRajendra Nayak #interrupt-cells = <2>; 149*5913f635SRajendra Nayak gpio-ranges = <&tlmm 0 0 175>; 150*5913f635SRajendra Nayak wakeup-parent = <&pdc>; 151*5913f635SRajendra Nayak 152*5913f635SRajendra Nayak qup_uart5_default: qup-uart5-pins { 153*5913f635SRajendra Nayak pins = "gpio46", "gpio47"; 154*5913f635SRajendra Nayak function = "qup13"; 155*5913f635SRajendra Nayak drive-strength = <2>; 156*5913f635SRajendra Nayak bias-disable; 157*5913f635SRajendra Nayak }; 158*5913f635SRajendra Nayak }; 159