1*f9a06b81SDmitry Baryshkov# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 2*f9a06b81SDmitry Baryshkov%YAML 1.2 3*f9a06b81SDmitry Baryshkov--- 4*f9a06b81SDmitry Baryshkov$id: http://devicetree.org/schemas/pinctrl/qcom,pmic-mpp.yaml# 5*f9a06b81SDmitry Baryshkov$schema: http://devicetree.org/meta-schemas/core.yaml# 6*f9a06b81SDmitry Baryshkov 7*f9a06b81SDmitry Baryshkovtitle: Qualcomm PMIC Multi-Purpose Pin (MPP) block 8*f9a06b81SDmitry Baryshkov 9*f9a06b81SDmitry Baryshkovmaintainers: 10*f9a06b81SDmitry Baryshkov - Bjorn Andersson <bjorn.andersson@linaro.org> 11*f9a06b81SDmitry Baryshkov 12*f9a06b81SDmitry Baryshkovdescription: 13*f9a06b81SDmitry Baryshkov This binding describes the MPP block(s) found in the 8xxx series of 14*f9a06b81SDmitry Baryshkov PMIC's from Qualcomm. 15*f9a06b81SDmitry Baryshkov 16*f9a06b81SDmitry Baryshkovproperties: 17*f9a06b81SDmitry Baryshkov compatible: 18*f9a06b81SDmitry Baryshkov items: 19*f9a06b81SDmitry Baryshkov - enum: 20*f9a06b81SDmitry Baryshkov - qcom,pm8018-mpp 21*f9a06b81SDmitry Baryshkov - qcom,pm8019-mpp 22*f9a06b81SDmitry Baryshkov - qcom,pm8038-mpp 23*f9a06b81SDmitry Baryshkov - qcom,pm8058-mpp 24*f9a06b81SDmitry Baryshkov - qcom,pm8821-mpp 25*f9a06b81SDmitry Baryshkov - qcom,pm8841-mpp 26*f9a06b81SDmitry Baryshkov - qcom,pm8916-mpp 27*f9a06b81SDmitry Baryshkov - qcom,pm8917-mpp 28*f9a06b81SDmitry Baryshkov - qcom,pm8921-mpp 29*f9a06b81SDmitry Baryshkov - qcom,pm8941-mpp 30*f9a06b81SDmitry Baryshkov - qcom,pm8950-mpp 31*f9a06b81SDmitry Baryshkov - qcom,pmi8950-mpp 32*f9a06b81SDmitry Baryshkov - qcom,pm8994-mpp 33*f9a06b81SDmitry Baryshkov - qcom,pma8084-mpp 34*f9a06b81SDmitry Baryshkov - qcom,pmi8994-mpp 35*f9a06b81SDmitry Baryshkov 36*f9a06b81SDmitry Baryshkov - enum: 37*f9a06b81SDmitry Baryshkov - qcom,spmi-mpp 38*f9a06b81SDmitry Baryshkov - qcom,ssbi-mpp 39*f9a06b81SDmitry Baryshkov 40*f9a06b81SDmitry Baryshkov reg: 41*f9a06b81SDmitry Baryshkov maxItems: 1 42*f9a06b81SDmitry Baryshkov 43*f9a06b81SDmitry Baryshkov interrupts: 44*f9a06b81SDmitry Baryshkov minItems: 1 45*f9a06b81SDmitry Baryshkov maxItems: 12 46*f9a06b81SDmitry Baryshkov description: 47*f9a06b81SDmitry Baryshkov Must contain an array of encoded interrupt specifiers for 48*f9a06b81SDmitry Baryshkov each available MPP 49*f9a06b81SDmitry Baryshkov 50*f9a06b81SDmitry Baryshkov gpio-controller: true 51*f9a06b81SDmitry Baryshkov gpio-line-names: true 52*f9a06b81SDmitry Baryshkov 53*f9a06b81SDmitry Baryshkov gpio-ranges: 54*f9a06b81SDmitry Baryshkov maxItems: 1 55*f9a06b81SDmitry Baryshkov 56*f9a06b81SDmitry Baryshkov '#gpio-cells': 57*f9a06b81SDmitry Baryshkov const: 2 58*f9a06b81SDmitry Baryshkov description: 59*f9a06b81SDmitry Baryshkov The first cell will be used to define gpio number and the 60*f9a06b81SDmitry Baryshkov second denotes the flags for this gpio 61*f9a06b81SDmitry Baryshkov 62*f9a06b81SDmitry BaryshkovadditionalProperties: false 63*f9a06b81SDmitry Baryshkov 64*f9a06b81SDmitry Baryshkovrequired: 65*f9a06b81SDmitry Baryshkov - compatible 66*f9a06b81SDmitry Baryshkov - reg 67*f9a06b81SDmitry Baryshkov - gpio-controller 68*f9a06b81SDmitry Baryshkov - '#gpio-cells' 69*f9a06b81SDmitry Baryshkov - gpio-ranges 70*f9a06b81SDmitry Baryshkov 71*f9a06b81SDmitry BaryshkovpatternProperties: 72*f9a06b81SDmitry Baryshkov '-state$': 73*f9a06b81SDmitry Baryshkov oneOf: 74*f9a06b81SDmitry Baryshkov - $ref: "#/$defs/qcom-pmic-mpp-state" 75*f9a06b81SDmitry Baryshkov - patternProperties: 76*f9a06b81SDmitry Baryshkov "mpp": 77*f9a06b81SDmitry Baryshkov $ref: "#/$defs/qcom-pmic-mpp-state" 78*f9a06b81SDmitry Baryshkov additionalProperties: false 79*f9a06b81SDmitry Baryshkov 80*f9a06b81SDmitry Baryshkov$defs: 81*f9a06b81SDmitry Baryshkov qcom-pmic-mpp-state: 82*f9a06b81SDmitry Baryshkov type: object 83*f9a06b81SDmitry Baryshkov allOf: 84*f9a06b81SDmitry Baryshkov - $ref: "pinmux-node.yaml" 85*f9a06b81SDmitry Baryshkov - $ref: "pincfg-node.yaml" 86*f9a06b81SDmitry Baryshkov properties: 87*f9a06b81SDmitry Baryshkov pins: 88*f9a06b81SDmitry Baryshkov description: 89*f9a06b81SDmitry Baryshkov List of gpio pins affected by the properties specified in 90*f9a06b81SDmitry Baryshkov this subnode. Valid pins are 91*f9a06b81SDmitry Baryshkov - mpp1-mpp4 for pm8841 92*f9a06b81SDmitry Baryshkov - mpp1-mpp4 for pm8916 93*f9a06b81SDmitry Baryshkov - mpp1-mpp8 for pm8941 94*f9a06b81SDmitry Baryshkov - mpp1-mpp4 for pm8950 95*f9a06b81SDmitry Baryshkov - mpp1-mpp4 for pmi8950 96*f9a06b81SDmitry Baryshkov - mpp1-mpp4 for pma8084 97*f9a06b81SDmitry Baryshkov 98*f9a06b81SDmitry Baryshkov items: 99*f9a06b81SDmitry Baryshkov pattern: "^mpp([0-9]+)$" 100*f9a06b81SDmitry Baryshkov 101*f9a06b81SDmitry Baryshkov function: 102*f9a06b81SDmitry Baryshkov items: 103*f9a06b81SDmitry Baryshkov - enum: 104*f9a06b81SDmitry Baryshkov - digital 105*f9a06b81SDmitry Baryshkov - analog 106*f9a06b81SDmitry Baryshkov - sink 107*f9a06b81SDmitry Baryshkov 108*f9a06b81SDmitry Baryshkov bias-disable: true 109*f9a06b81SDmitry Baryshkov bias-pull-up: true 110*f9a06b81SDmitry Baryshkov bias-high-impedance: true 111*f9a06b81SDmitry Baryshkov input-enable: true 112*f9a06b81SDmitry Baryshkov output-high: true 113*f9a06b81SDmitry Baryshkov output-low: true 114*f9a06b81SDmitry Baryshkov power-source: true 115*f9a06b81SDmitry Baryshkov 116*f9a06b81SDmitry Baryshkov qcom,analog-level: 117*f9a06b81SDmitry Baryshkov $ref: /schemas/types.yaml#/definitions/uint32 118*f9a06b81SDmitry Baryshkov description: 119*f9a06b81SDmitry Baryshkov Selects the source for analog output. Valued values are defined in 120*f9a06b81SDmitry Baryshkov <dt-binding/pinctrl/qcom,pmic-mpp.h> PMIC_MPP_AOUT_LVL_* 121*f9a06b81SDmitry Baryshkov enum: [0, 1, 2, 3, 4, 5, 6, 7] 122*f9a06b81SDmitry Baryshkov 123*f9a06b81SDmitry Baryshkov qcom,atest: 124*f9a06b81SDmitry Baryshkov $ref: /schemas/types.yaml#/definitions/uint32 125*f9a06b81SDmitry Baryshkov description: 126*f9a06b81SDmitry Baryshkov Selects ATEST rail to route to GPIO when it's 127*f9a06b81SDmitry Baryshkov configured in analog-pass-through mode. 128*f9a06b81SDmitry Baryshkov enum: [1, 2, 3, 4] 129*f9a06b81SDmitry Baryshkov 130*f9a06b81SDmitry Baryshkov qcom,dtest: 131*f9a06b81SDmitry Baryshkov $ref: /schemas/types.yaml#/definitions/uint32 132*f9a06b81SDmitry Baryshkov description: 133*f9a06b81SDmitry Baryshkov Selects DTEST rail to route to GPIO when it's 134*f9a06b81SDmitry Baryshkov configured as digital input. 135*f9a06b81SDmitry Baryshkov enum: [1, 2, 3, 4] 136*f9a06b81SDmitry Baryshkov 137*f9a06b81SDmitry Baryshkov qcom,amux-route: 138*f9a06b81SDmitry Baryshkov $ref: /schemas/types.yaml#/definitions/uint32 139*f9a06b81SDmitry Baryshkov description: 140*f9a06b81SDmitry Baryshkov Selects the source for analog input. Valid values are defined in 141*f9a06b81SDmitry Baryshkov <dt-bindings/pinctrl/qcom,pmic-mpp.h> PMIC_MPP_AMUX_ROUTE_CH5, 142*f9a06b81SDmitry Baryshkov PMIC_MPP_AMUX_ROUTE_CH6... 143*f9a06b81SDmitry Baryshkov enum: [0, 1, 2, 3, 4, 5, 6, 7] 144*f9a06b81SDmitry Baryshkov 145*f9a06b81SDmitry Baryshkov qcom,paired: 146*f9a06b81SDmitry Baryshkov - description: 147*f9a06b81SDmitry Baryshkov Indicates that the pin should be operating in paired mode. 148*f9a06b81SDmitry Baryshkov 149*f9a06b81SDmitry Baryshkov required: 150*f9a06b81SDmitry Baryshkov - pins 151*f9a06b81SDmitry Baryshkov - function 152*f9a06b81SDmitry Baryshkov 153*f9a06b81SDmitry Baryshkov additionalProperties: false 154*f9a06b81SDmitry Baryshkov 155*f9a06b81SDmitry Baryshkovexamples: 156*f9a06b81SDmitry Baryshkov - | 157*f9a06b81SDmitry Baryshkov #include <dt-bindings/pinctrl/qcom,pmic-mpp.h> 158*f9a06b81SDmitry Baryshkov 159*f9a06b81SDmitry Baryshkov pm8841_mpp: mpps@a000 { 160*f9a06b81SDmitry Baryshkov compatible = "qcom,pm8841-mpp", "qcom,spmi-mpp"; 161*f9a06b81SDmitry Baryshkov reg = <0xa000 0>; 162*f9a06b81SDmitry Baryshkov gpio-controller; 163*f9a06b81SDmitry Baryshkov #gpio-cells = <2>; 164*f9a06b81SDmitry Baryshkov gpio-ranges = <&pm8841_mpp 0 0 4>; 165*f9a06b81SDmitry Baryshkov gpio-line-names = "VDD_PX_BIAS", "WLAN_LED_CTRL", 166*f9a06b81SDmitry Baryshkov "BT_LED_CTRL", "GPIO-F"; 167*f9a06b81SDmitry Baryshkov interrupts = <4 0xa0 0 0>, <4 0xa1 0 0>, <4 0xa2 0 0>, <4 0xa3 0 0>; 168*f9a06b81SDmitry Baryshkov 169*f9a06b81SDmitry Baryshkov pinctrl-names = "default"; 170*f9a06b81SDmitry Baryshkov pinctrl-0 = <&pm8841_default>; 171*f9a06b81SDmitry Baryshkov 172*f9a06b81SDmitry Baryshkov mpp1-state { 173*f9a06b81SDmitry Baryshkov pins = "mpp1"; 174*f9a06b81SDmitry Baryshkov function = "digital"; 175*f9a06b81SDmitry Baryshkov input-enable; 176*f9a06b81SDmitry Baryshkov power-source = <PM8841_MPP_S3>; 177*f9a06b81SDmitry Baryshkov }; 178*f9a06b81SDmitry Baryshkov 179*f9a06b81SDmitry Baryshkov default-state { 180*f9a06b81SDmitry Baryshkov gpio-mpp { 181*f9a06b81SDmitry Baryshkov pins = "mpp1", "mpp2", "mpp3", "mpp4"; 182*f9a06b81SDmitry Baryshkov function = "digital"; 183*f9a06b81SDmitry Baryshkov input-enable; 184*f9a06b81SDmitry Baryshkov power-source = <PM8841_MPP_S3>; 185*f9a06b81SDmitry Baryshkov }; 186*f9a06b81SDmitry Baryshkov }; 187*f9a06b81SDmitry Baryshkov }; 188*f9a06b81SDmitry Baryshkov... 189