1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/pinctrl/qcom,msm8953-pinctrl.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Qualcomm Technologies, Inc. MSM8953 TLMM block 8 9maintainers: 10 - Bjorn Andersson <bjorn.andersson@linaro.org> 11 12description: | 13 This binding describes the Top Level Mode Multiplexer block found in the 14 MSM8953 platform. 15 16properties: 17 compatible: 18 const: qcom,msm8953-pinctrl 19 20 reg: 21 maxItems: 1 22 23 interrupts: true 24 interrupt-controller: true 25 "#interrupt-cells": true 26 gpio-controller: true 27 gpio-reserved-ranges: true 28 "#gpio-cells": true 29 gpio-ranges: true 30 31patternProperties: 32 "-state$": 33 oneOf: 34 - $ref: "#/$defs/qcom-msm8953-tlmm-state" 35 - patternProperties: 36 "-pins$": 37 $ref: "#/$defs/qcom-msm8953-tlmm-state" 38 additionalProperties: false 39 40$defs: 41 qcom-msm8953-tlmm-state: 42 type: object 43 description: 44 Pinctrl node's client devices use subnodes for desired pin configuration. 45 Client device subnodes use below standard properties. 46 $ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state 47 48 properties: 49 pins: 50 description: 51 List of gpio pins affected by the properties specified in this 52 subnode. 53 items: 54 oneOf: 55 - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-7][0-9])$" 56 - enum: [ sdc1_clk, sdc1_cmd, sdc1_data, sdc1_rclk, sdc2_clk, 57 sdc2_cmd, sdc2_data, qdsd_clk, qdsd_cmd, qdsd_data0, 58 qdsd_data1, qdsd_data2, qdsd_data3 ] 59 minItems: 1 60 maxItems: 16 61 62 function: 63 description: 64 Specify the alternative function to be configured for the specified 65 pins. 66 67 enum: [ accel_int, adsp_ext, alsp_int, atest_bbrx0, atest_bbrx1, 68 atest_char, atest_char0, atest_char1, atest_char2, atest_char3, 69 atest_gpsadc_dtest0_native, atest_gpsadc_dtest1_native, atest_tsens, 70 atest_wlan0, atest_wlan1, bimc_dte0, bimc_dte1, blsp1_spi, 71 blsp3_spi, blsp6_spi, blsp7_spi, blsp_i2c1, blsp_i2c2, blsp_i2c3, 72 blsp_i2c4, blsp_i2c5, blsp_i2c6, blsp_i2c7, blsp_i2c8, blsp_spi1, 73 blsp_spi2, blsp_spi3, blsp_spi4, blsp_spi5, blsp_spi6, blsp_spi7, 74 blsp_spi8, blsp_uart2, blsp_uart4, blsp_uart5, blsp_uart6, cam0_ldo, 75 cam1_ldo, cam1_rst, cam1_standby, cam2_rst, cam2_standby, cam3_rst, 76 cam3_standby, cam_irq, cam_mclk, cap_int, cci_async, cci_i2c, 77 cci_timer0, cci_timer1, cci_timer2, cci_timer3, cci_timer4, 78 cdc_pdm0, codec_int1, codec_int2, codec_reset, cri_trng, cri_trng0, 79 cri_trng1, dac_calib0, dac_calib1, dac_calib10, dac_calib11, 80 dac_calib12, dac_calib13, dac_calib14, dac_calib15, dac_calib16, 81 dac_calib17, dac_calib18, dac_calib19, dac_calib2, dac_calib20, 82 dac_calib21, dac_calib22, dac_calib23, dac_calib24, dac_calib25, 83 dac_calib3, dac_calib4, dac_calib5, dac_calib6, dac_calib7, 84 dac_calib8, dac_calib9, dbg_out, ddr_bist, dmic0_clk, dmic0_data, 85 ebi_cdc, ebi_ch0, ext_lpass, flash_strobe, fp_int, gcc_gp1_clk_a, 86 gcc_gp1_clk_b, gcc_gp2_clk_a, gcc_gp2_clk_b, gcc_gp3_clk_a, 87 gcc_gp3_clk_b, gcc_plltest, gcc_tlmm, gpio, gsm0_tx, gsm1_tx, 88 gyro_int, hall_int, hdmi_int, key_focus, key_home, key_snapshot, 89 key_volp, ldo_en, ldo_update, lpass_slimbus, lpass_slimbus0, 90 lpass_slimbus1, m_voc, mag_int, mdp_vsync, mipi_dsi0, modem_tsync, 91 mss_lte, nav_pps, nav_pps_in_a, nav_pps_in_b, nav_tsync, 92 nfc_disable, nfc_dwl, nfc_irq, ois_sync, pa_indicator, pbs0, pbs1, 93 pbs2, pressure_int, pri_mi2s, pri_mi2s_mclk_a, pri_mi2s_mclk_b, 94 pri_mi2s_ws, prng_rosc, pwr_crypto_enabled_a, pwr_crypto_enabled_b, 95 pwr_down, pwr_modem_enabled_a, pwr_modem_enabled_b, 96 pwr_nav_enabled_a, pwr_nav_enabled_b, qdss_cti_trig_in_a0, 97 qdss_cti_trig_in_a1, qdss_cti_trig_in_b0, qdss_cti_trig_in_b1, 98 qdss_cti_trig_out_a0, qdss_cti_trig_out_a1, qdss_cti_trig_out_b0, 99 qdss_cti_trig_out_b1, qdss_traceclk_a, qdss_traceclk_b, 100 qdss_tracectl_a, qdss_tracectl_b, qdss_tracedata_a, 101 qdss_tracedata_b, sd_write, sdcard_det, sec_mi2s, sec_mi2s_mclk_a, 102 sec_mi2s_mclk_b, smb_int, ss_switch, ssbi_wtr1, ts_resout, 103 ts_sample, ts_xvdd, tsens_max, uim1_clk, uim1_data, uim1_present, 104 uim1_reset, uim2_clk, uim2_data, uim2_present, uim2_reset, 105 uim_batt, us_emitter, us_euro, wcss_bt, wcss_fm, wcss_wlan, 106 wcss_wlan0, wcss_wlan1, wcss_wlan2, wsa_en, wsa_io, wsa_irq ] 107 108 bias-pull-down: true 109 bias-pull-up: true 110 bias-disable: true 111 drive-strength: true 112 output-high: true 113 output-low: true 114 115 required: 116 - pins 117 118 additionalProperties: false 119 120allOf: 121 - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml# 122 123required: 124 - compatible 125 - reg 126 127additionalProperties: false 128 129examples: 130 - | 131 #include <dt-bindings/interrupt-controller/arm-gic.h> 132 tlmm: pinctrl@1000000 { 133 compatible = "qcom,msm8953-pinctrl"; 134 reg = <0x01000000 0x300000>; 135 interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>; 136 interrupt-controller; 137 #interrupt-cells = <2>; 138 gpio-controller; 139 #gpio-cells = <2>; 140 gpio-ranges = <&tlmm 0 0 142>; 141 142 serial_default: serial-state { 143 pins = "gpio4", "gpio5"; 144 function = "blsp_uart2"; 145 drive-strength = <2>; 146 bias-disable; 147 }; 148 }; 149