1Microchip MCP2308/MCP23S08/MCP23017/MCP23S17 driver for 28-/16-bit I/O expander with serial interface (I2C/SPI) 3 4Required properties: 5- compatible : Should be 6 - "mcp,mcp23s08" (DEPRECATED) for 8 GPIO SPI version 7 - "mcp,mcp23s17" (DEPRECATED) for 16 GPIO SPI version 8 - "mcp,mcp23008" (DEPRECATED) for 8 GPIO I2C version or 9 - "mcp,mcp23017" (DEPRECATED) for 16 GPIO I2C version of the chip 10 11 - "microchip,mcp23s08" for 8 GPIO SPI version 12 - "microchip,mcp23s17" for 16 GPIO SPI version 13 - "microchip,mcp23s18" for 16 GPIO SPI version 14 - "microchip,mcp23008" for 8 GPIO I2C version or 15 - "microchip,mcp23017" for 16 GPIO I2C version of the chip 16 - "microchip,mcp23018" for 16 GPIO I2C version 17 NOTE: Do not use the old mcp prefix any more. It is deprecated and will be 18 removed. 19- #gpio-cells : Should be two. 20 - first cell is the pin number 21 - second cell is used to specify flags. Flags are currently unused. 22- gpio-controller : Marks the device node as a GPIO controller. 23- reg : For an address on its bus. I2C uses this a the I2C address of the chip. 24 SPI uses this to specify the chipselect line which the chip is 25 connected to. The driver and the SPI variant of the chip support 26 multiple chips on the same chipselect. Have a look at 27 microchip,spi-present-mask below. 28 29Required device specific properties (only for SPI chips): 30- mcp,spi-present-mask (DEPRECATED) 31- microchip,spi-present-mask : This is a present flag, that makes only sense for SPI 32 chips - as the name suggests. Multiple SPI chips can share the same 33 SPI chipselect. Set a bit in bit0-7 in this mask to 1 if there is a 34 chip connected with the corresponding spi address set. For example if 35 you have a chip with address 3 connected, you have to set bit3 to 1, 36 which is 0x08. mcp23s08 chip variant only supports bits 0-3. It is not 37 possible to mix mcp23s08 and mcp23s17 on the same chipselect. Set at 38 least one bit to 1 for SPI chips. 39 NOTE: Do not use the old mcp prefix any more. It is deprecated and will be 40 removed. 41- spi-max-frequency = The maximum frequency this chip is able to handle 42 43Optional properties: 44- #interrupt-cells : Should be two. 45 - first cell is the pin number 46 - second cell is used to specify flags. 47- interrupt-controller: Marks the device node as a interrupt controller. 48 49Optional device specific properties: 50- microchip,irq-mirror: Sets the mirror flag in the IOCON register. Devices 51 with two interrupt outputs (these are the devices ending with 17 and 52 those that have 16 IOs) have two IO banks: IO 0-7 form bank 1 and 53 IO 8-15 are bank 2. These chips have two different interrupt outputs: 54 One for bank 1 and another for bank 2. If irq-mirror is set, both 55 interrupts are generated regardless of the bank that an input change 56 occurred on. If it is not set, the interrupt are only generated for the 57 bank they belong to. 58 On devices with only one interrupt output this property is useless. 59- microchip,irq-active-high: Sets the INTPOL flag in the IOCON register. This 60 configures the IRQ output polarity as active high. 61 62Example I2C (with interrupt): 63gpiom1: gpio@20 { 64 compatible = "microchip,mcp23017"; 65 gpio-controller; 66 #gpio-cells = <2>; 67 reg = <0x20>; 68 69 interrupt-parent = <&gpio1>; 70 interrupts = <17 IRQ_TYPE_LEVEL_LOW>; 71 interrupt-controller; 72 #interrupt-cells=<2>; 73 microchip,irq-mirror; 74}; 75 76Example SPI: 77gpiom1: gpio@0 { 78 compatible = "microchip,mcp23s17"; 79 gpio-controller; 80 #gpio-cells = <2>; 81 spi-present-mask = <0x01>; 82 reg = <0>; 83 spi-max-frequency = <1000000>; 84}; 85 86Pull-up configuration 87===================== 88 89If pins are used as output, they can also be configured with pull-ups. This is 90done with pinctrl. 91 92Please refer file <devicetree/bindings/pinctrl/pinctrl-bindings.txt> 93for details of the common pinctrl bindings used by client devices, 94including the meaning of the phrase "pin configuration node". 95 96Optional Pinmux properties: 97-------------------------- 98Following properties are required if default setting of pins are required 99at boot. 100- pinctrl-names: A pinctrl state named per <pinctrl-binding.txt>. 101- pinctrl[0...n]: Properties to contain the phandle for pinctrl states per 102 <pinctrl-binding.txt>. 103 104The pin configurations are defined as child of the pinctrl states node. Each 105sub-node have following properties: 106 107Required properties: 108------------------ 109- pins: List of pins. Valid values of pins properties are: 110 gpio0 ... gpio7 for the devices with 8 GPIO pins and 111 gpio0 ... gpio15 for the devices with 16 GPIO pins. 112 113Optional properties: 114------------------- 115The following optional property is defined in the pinmux DT binding document 116<pinctrl-bindings.txt>. Absence of this property will leave the configuration 117in its default state. 118 bias-pull-up 119 120Example with pinctrl to pull-up output pins: 121gpio21: gpio@21 { 122 compatible = "microchip,mcp23017"; 123 gpio-controller; 124 #gpio-cells = <0x2>; 125 reg = <0x21>; 126 interrupt-parent = <&socgpio>; 127 interrupts = <0x17 0x8>; 128 interrupt-names = "mcp23017@21 irq"; 129 interrupt-controller; 130 #interrupt-cells = <0x2>; 131 microchip,irq-mirror; 132 pinctrl-names = "default"; 133 pinctrl-0 = <&i2cgpio0irq &gpio21pullups>; 134 135 gpio21pullups: pinmux { 136 pins = "gpio0", "gpio1", "gpio2", "gpio3", 137 "gpio4", "gpio5", "gpio6", "gpio7", 138 "gpio8", "gpio9", "gpio10", "gpio11", 139 "gpio12", "gpio13", "gpio14", "gpio15"; 140 bias-pull-up; 141 }; 142}; 143