1*85798213SPrathamesh Shete# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2*85798213SPrathamesh Shete%YAML 1.2
3*85798213SPrathamesh Shete---
4*85798213SPrathamesh Shete$id: http://devicetree.org/schemas/pinctrl/nvidia,tegra234-pinmux-aon.yaml#
5*85798213SPrathamesh Shete$schema: http://devicetree.org/meta-schemas/core.yaml#
6*85798213SPrathamesh Shete
7*85798213SPrathamesh Shetetitle: NVIDIA Tegra234 AON Pinmux Controller
8*85798213SPrathamesh Shete
9*85798213SPrathamesh Shetemaintainers:
10*85798213SPrathamesh Shete  - Thierry Reding <thierry.reding@gmail.com>
11*85798213SPrathamesh Shete  - Jon Hunter <jonathanh@nvidia.com>
12*85798213SPrathamesh Shete
13*85798213SPrathamesh Shete$ref: nvidia,tegra234-pinmux-common.yaml
14*85798213SPrathamesh Shete
15*85798213SPrathamesh Sheteproperties:
16*85798213SPrathamesh Shete  compatible:
17*85798213SPrathamesh Shete    const: nvidia,tegra234-pinmux-aon
18*85798213SPrathamesh Shete
19*85798213SPrathamesh ShetepatternProperties:
20*85798213SPrathamesh Shete  "^pinmux(-[a-z0-9-]+)?$":
21*85798213SPrathamesh Shete    type: object
22*85798213SPrathamesh Shete
23*85798213SPrathamesh Shete    # pin groups
24*85798213SPrathamesh Shete    additionalProperties:
25*85798213SPrathamesh Shete      properties:
26*85798213SPrathamesh Shete        nvidia,pins:
27*85798213SPrathamesh Shete          items:
28*85798213SPrathamesh Shete            enum: [ can0_dout_paa0, can0_din_paa1, can1_dout_paa2,
29*85798213SPrathamesh Shete                    can1_din_paa3, can0_stb_paa4, can0_en_paa5,
30*85798213SPrathamesh Shete                    soc_gpio49_paa6, can0_err_paa7, can1_stb_pbb0,
31*85798213SPrathamesh Shete                    can1_en_pbb1, soc_gpio50_pbb2, can1_err_pbb3,
32*85798213SPrathamesh Shete                    spi2_sck_pcc0, spi2_miso_pcc1, spi2_mosi_pcc2,
33*85798213SPrathamesh Shete                    spi2_cs0_pcc3, touch_clk_pcc4, uart3_tx_pcc5,
34*85798213SPrathamesh Shete                    uart3_rx_pcc6, gen2_i2c_scl_pcc7, gen2_i2c_sda_pdd0,
35*85798213SPrathamesh Shete                    gen8_i2c_scl_pdd1, gen8_i2c_sda_pdd2,
36*85798213SPrathamesh Shete                    sce_error_pee0, vcomp_alert_pee1,
37*85798213SPrathamesh Shete                    ao_retention_n_pee2, batt_oc_pee3, power_on_pee4,
38*85798213SPrathamesh Shete                    soc_gpio26_pee5, soc_gpio27_pee6, bootv_ctl_n_pee7,
39*85798213SPrathamesh Shete                    hdmi_cec_pgg0,
40*85798213SPrathamesh Shete                    # drive groups
41*85798213SPrathamesh Shete                    drive_touch_clk_pcc4, drive_uart3_rx_pcc6,
42*85798213SPrathamesh Shete                    drive_uart3_tx_pcc5, drive_gen8_i2c_sda_pdd2,
43*85798213SPrathamesh Shete                    drive_gen8_i2c_scl_pdd1, drive_spi2_mosi_pcc2,
44*85798213SPrathamesh Shete                    drive_gen2_i2c_scl_pcc7, drive_spi2_cs0_pcc3,
45*85798213SPrathamesh Shete                    drive_gen2_i2c_sda_pdd0, drive_spi2_sck_pcc0,
46*85798213SPrathamesh Shete                    drive_spi2_miso_pcc1, drive_can1_dout_paa2,
47*85798213SPrathamesh Shete                    drive_can1_din_paa3, drive_can0_dout_paa0,
48*85798213SPrathamesh Shete                    drive_can0_din_paa1, drive_can0_stb_paa4,
49*85798213SPrathamesh Shete                    drive_can0_en_paa5, drive_soc_gpio49_paa6,
50*85798213SPrathamesh Shete                    drive_can0_err_paa7, drive_can1_stb_pbb0,
51*85798213SPrathamesh Shete                    drive_can1_en_pbb1, drive_soc_gpio50_pbb2,
52*85798213SPrathamesh Shete                    drive_can1_err_pbb3, drive_sce_error_pee0,
53*85798213SPrathamesh Shete                    drive_batt_oc_pee3, drive_bootv_ctl_n_pee7,
54*85798213SPrathamesh Shete                    drive_power_on_pee4, drive_soc_gpio26_pee5,
55*85798213SPrathamesh Shete                    drive_soc_gpio27_pee6, drive_ao_retention_n_pee2,
56*85798213SPrathamesh Shete                    drive_vcomp_alert_pee1, drive_hdmi_cec_pgg0 ]
57*85798213SPrathamesh Shete
58*85798213SPrathamesh SheteunevaluatedProperties: false
59*85798213SPrathamesh Shete
60*85798213SPrathamesh Sheteexamples:
61*85798213SPrathamesh Shete  - |
62*85798213SPrathamesh Shete    #include <dt-bindings/pinctrl/pinctrl-tegra.h>
63*85798213SPrathamesh Shete
64*85798213SPrathamesh Shete    pinmux@c300000 {
65*85798213SPrathamesh Shete      compatible = "nvidia,tegra234-pinmux-aon";
66*85798213SPrathamesh Shete      reg = <0xc300000 0x4000>;
67*85798213SPrathamesh Shete
68*85798213SPrathamesh Shete      pinctrl-names = "cec";
69*85798213SPrathamesh Shete      pinctrl-0 = <&cec_state>;
70*85798213SPrathamesh Shete
71*85798213SPrathamesh Shete      cec_state: pinmux-cec {
72*85798213SPrathamesh Shete        cec {
73*85798213SPrathamesh Shete          nvidia,pins = "hdmi_cec_pgg0";
74*85798213SPrathamesh Shete          nvidia,function = "gp";
75*85798213SPrathamesh Shete        };
76*85798213SPrathamesh Shete      };
77*85798213SPrathamesh Shete    };
78*85798213SPrathamesh Shete...
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