1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/pinctrl/mediatek,mt7986-pinctrl.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Mediatek MT7986 Pin Controller
8
9maintainers:
10  - Sean Wang <sean.wang@kernel.org>
11
12description: |+
13  The MediaTek's MT7986 Pin controller is used to control SoC pins.
14
15properties:
16  compatible:
17    enum:
18      - mediatek,mt7986a-pinctrl
19      - mediatek,mt7986b-pinctrl
20
21  reg:
22    minItems: 8
23    maxItems: 8
24
25  reg-names:
26    items:
27      - const: gpio
28      - const: iocfg_rt
29      - const: iocfg_rb
30      - const: iocfg_lt
31      - const: iocfg_lb
32      - const: iocfg_tr
33      - const: iocfg_tl
34      - const: eint
35
36  gpio-controller: true
37
38  "#gpio-cells":
39    const: 2
40    description: |
41      Number of cells in GPIO specifier. Since the generic GPIO
42      binding is used, the amount of cells must be specified as 2. See the below
43      mentioned gpio binding representation for description of particular cells.
44
45  gpio-ranges:
46    minItems: 1
47    maxItems: 5
48    description: |
49      GPIO valid number range.
50
51  interrupt-controller: true
52
53  interrupts:
54    maxItems: 1
55
56  "#interrupt-cells":
57    const: 2
58
59allOf:
60  - $ref: "pinctrl.yaml#"
61
62required:
63  - compatible
64  - reg
65  - reg-names
66  - gpio-controller
67  - "#gpio-cells"
68
69patternProperties:
70  '-pins$':
71    type: object
72    additionalProperties: false
73
74    patternProperties:
75      '.*mux.*':
76        type: object
77        additionalProperties: false
78        description: |
79          pinmux configuration nodes.
80
81          The following table shows the effective values of "group", "function"
82          properties and chip pinout pins
83
84          groups	    function    pins (in pin#)
85          ---------------------------------------------------------------------
86          "watchdog"        "watchdog"  0
87          "wifi_led"        "led"       1, 2
88          "i2c"             "i2c"       3, 4
89          "uart1_0"         "uart"      7, 8, 9, 10
90          "uart1_rx_tx"     "uart"      42, 43
91          "uart1_cts_rts"   "uart"      44, 45
92          "pcie_clk"        "pcie"      9
93          "pcie_wake"       "pcie"      10
94          "spi1_0"          "spi"       11, 12, 13, 14
95          "pwm1_1"          "pwm"       20,
96          "pwm0"            "pwm"       21,
97          "pwm1_0"          "pwm"       22,
98          "snfi"            "flash"     23, 24, 25, 26, 27, 28
99          "spi1_2"          "spi"       29, 30, 31, 32
100          "emmc_45"         "emmc"      22, 23, 24, 25, 26, 27, 28, 29, 30,
101                                        31, 32
102          "spi1_1"          "spi"       23, 24, 25, 26
103          "uart1_2_rx_tx"   "uart"      29, 30
104          "uart1_2_cts_rts" "uart"      31, 32
105          "uart1_1"         "uart"      23, 24, 25, 26
106          "uart2_0_rx_tx"   "uart"      29, 30
107          "uart2_0_cts_rts" "uart"      31, 32
108          "spi0"            "spi"       33, 34, 35, 36
109          "spi0_wp_hold"    "spi"       37, 38
110          "uart1_3_rx_tx"   "uart"      35, 36
111          "uart1_3_cts_rts" "uart"      37, 38
112          "uart2_1"         "uart"      33, 34, 35, 36
113          "spi1_3"          "spi"       33, 34, 35, 36
114          "uart0"           "uart"      39, 40
115          "pcie_pereset"    "pcie"      41
116          "uart1"           "uart"      42, 43, 44, 45
117          "uart2"           "uart"      46, 47, 48, 49
118          "emmc_51"         "emmc"      50, 51, 52, 53, 54, 55, 56, 57, 57,
119                                        59, 60, 61
120          "pcm"             "audio"     62, 63, 64, 65
121          "i2s"             "audio"     62, 63, 64, 65
122          "switch_int"      "eth"       66
123          "mdc_mdio"        "eth"       67
124          "wf_2g"           "wifi"      74, 75, 76, 77, 78, 79, 80, 81, 82, 83
125          "wf_5g"           "wifi"      91, 92, 93, 94, 95, 96, 97, 98, 99, 100
126          "wf_dbdc"         "wifi"      74, 75, 76, 77, 78, 79, 80, 81, 82, 83,
127                                        84, 85
128
129        $ref: "/schemas/pinctrl/pinmux-node.yaml"
130        properties:
131          function:
132            description: |
133              A string containing the name of the function to mux to the group.
134              There is no "audio", "pcie" functions on mt7986b, you can only use
135              those functions on mt7986a.
136            enum: [audio, emmc, eth, i2c, led, flash, pcie, pwm, spi, uart,
137                   watchdog, wifi]
138          groups:
139            description: |
140              An array of strings. Each string contains the name of a group.
141              There is no "pcie_pereset", "uart1", "uart2" "emmc_51", "pcm",
142              and "i2s" groups on mt7986b, you can only use those groups on
143              mt7986a.
144        required:
145          - function
146          - groups
147
148        allOf:
149          - if:
150              properties:
151                function:
152                  const: audio
153            then:
154              properties:
155                groups:
156                  enum: [pcm, i2s]
157          - if:
158              properties:
159                function:
160                  const: emmc
161            then:
162              properties:
163                groups:
164                  enum: [emmc_45, emmc_51]
165          - if:
166              properties:
167                function:
168                  const: eth
169            then:
170              properties:
171                groups:
172                  enum: [switch_int, mdc_mdio]
173          - if:
174              properties:
175                function:
176                  const: i2c
177            then:
178              properties:
179                groups:
180                  enum: [i2c]
181          - if:
182              properties:
183                function:
184                  const: led
185            then:
186              properties:
187                groups:
188                  enum: [wifi_led]
189          - if:
190              properties:
191                function:
192                  const: flash
193            then:
194              properties:
195                groups:
196                  enum: [snfi]
197          - if:
198              properties:
199                function:
200                  const: pcie
201            then:
202              properties:
203                groups:
204                  items:
205                    enum: [pcie_clk, pcie_wake, pcie_pereset]
206                  maxItems: 3
207          - if:
208              properties:
209                function:
210                  const: pwm
211            then:
212              properties:
213                groups:
214                  items:
215                    enum: [pwm0, pwm1_0, pwm1_1]
216                  maxItems: 2
217          - if:
218              properties:
219                function:
220                  const: spi
221            then:
222              properties:
223                groups:
224                  items:
225                    enum: [spi0, spi0_wp_hold, spi1_0, spi1_1, spi1_2, spi1_3]
226                  maxItems: 2
227          - if:
228              properties:
229                function:
230                  const: uart
231            then:
232              properties:
233                groups:
234                  items:
235                    enum: [uart1_0, uart1_rx_tx, uart1_cts_rts, uart1_1,
236                           uart1_2_rx_tx, uart1_2_cts_rts, uart1_3_rx_tx,
237                           uart1_3_cts_rts, uart2_0_rx_tx, uart2_0_cts_rts,
238                           uart2_1, uart0, uart1, uart2]
239                  maxItems: 2
240          - if:
241              properties:
242                function:
243                  const: watchdog
244            then:
245              properties:
246                groups:
247                  enum: [watchdog]
248          - if:
249              properties:
250                function:
251                  const: wifi
252            then:
253              properties:
254                groups:
255                  items:
256                    enum: [wf_2g, wf_5g, wf_dbdc]
257                  maxItems: 3
258      '.*conf.*':
259        type: object
260        additionalProperties: false
261        description: |
262          pinconf configuration nodes.
263        $ref: "/schemas/pinctrl/pincfg-node.yaml"
264
265        properties:
266          pins:
267            description: |
268              An array of strings. Each string contains the name of a pin.
269              There is no PIN 41 to PIN 65 above on mt7686b, you can only use
270              those pins on mt7986a.
271            items:
272              enum: [SYS_WATCHDOG, WF2G_LED, WF5G_LED, I2C_SCL, I2C_SDA, GPIO_0,
273                     GPIO_1, GPIO_2, GPIO_3, GPIO_4, GPIO_5, GPIO_6, GPIO_7,
274                     GPIO_8, GPIO_9, GPIO_10, GPIO_11, GPIO_12, GPIO_13, GPIO_14,
275                     GPIO_15, PWM0, PWM1, SPI0_CLK, SPI0_MOSI, SPI0_MISO, SPI0_CS,
276                     SPI0_HOLD, SPI0_WP, SPI1_CLK, SPI1_MOSI, SPI1_MISO, SPI1_CS,
277                     SPI2_CLK, SPI2_MOSI, SPI2_MISO, SPI2_CS, SPI2_HOLD, SPI2_WP,
278                     UART0_RXD, UART0_TXD, PCIE_PERESET_N, UART1_RXD, UART1_TXD,
279                     UART1_CTS, UART1_RTS, UART2_RXD, UART2_TXD, UART2_CTS,
280                     UART2_RTS, EMMC_DATA_0, EMMC_DATA_1, EMMC_DATA_2,
281                     EMMC_DATA_3, EMMC_DATA_4, EMMC_DATA_5, EMMC_DATA_6,
282                     EMMC_DATA_7, EMMC_CMD, EMMC_CK, EMMC_DSL, EMMC_RSTB, PCM_DTX,
283                     PCM_DRX, PCM_CLK, PCM_FS, MT7531_INT, SMI_MDC, SMI_MDIO,
284                     WF0_DIG_RESETB, WF0_CBA_RESETB, WF0_XO_REQ, WF0_TOP_CLK,
285                     WF0_TOP_DATA, WF0_HB1, WF0_HB2, WF0_HB3, WF0_HB4, WF0_HB0,
286                     WF0_HB0_B, WF0_HB5, WF0_HB6, WF0_HB7, WF0_HB8, WF0_HB9,
287                     WF0_HB10, WF1_DIG_RESETB, WF1_CBA_RESETB, WF1_XO_REQ,
288                     WF1_TOP_CLK, WF1_TOP_DATA, WF1_HB1, WF1_HB2, WF1_HB3,
289                     WF1_HB4, WF1_HB0, WF1_HB0_B, WF1_HB5, WF1_HB6, WF1_HB7,
290                     WF1_HB8]
291            maxItems: 101
292
293          bias-disable: true
294
295          bias-pull-up:
296            oneOf:
297              - type: boolean
298                description: normal pull up.
299              - enum: [100, 101, 102, 103]
300                description: |
301                  PUPD/R1/R0 pull down type. See MTK_PUPD_SET_R1R0 defines in
302                  dt-bindings/pinctrl/mt65xx.h.
303
304          bias-pull-down:
305            oneOf:
306              - type: boolean
307                description: normal pull down.
308              - enum: [100, 101, 102, 103]
309                description: |
310                  PUPD/R1/R0 pull down type. See MTK_PUPD_SET_R1R0 defines in
311                  dt-bindings/pinctrl/mt65xx.h.
312
313          input-enable: true
314
315          input-disable: true
316
317          output-enable: true
318
319          output-low: true
320
321          output-high: true
322
323          input-schmitt-enable: true
324
325          input-schmitt-disable: true
326
327          drive-strength:
328            enum: [2, 4, 6, 8, 10, 12, 14, 16]
329
330          mediatek,pull-up-adv:
331            description: |
332              Valid arguments for 'mediatek,pull-up-adv' are '0', '1', '2', '3'
333              Pull up setings for 2 pull resistors, R0 and R1. Valid arguments
334              are described as below:
335              0: (R1, R0) = (0, 0) which means R1 disabled and R0 disabled.
336              1: (R1, R0) = (0, 1) which means R1 disabled and R0 enabled.
337              2: (R1, R0) = (1, 0) which means R1 enabled and R0 disabled.
338              3: (R1, R0) = (1, 1) which means R1 enabled and R0 enabled.
339            $ref: /schemas/types.yaml#/definitions/uint32
340            enum: [0, 1, 2, 3]
341
342          mediatek,pull-down-adv:
343            description: |
344              Valid arguments for 'mediatek,pull-up-adv' are '0', '1', '2', '3'
345              Pull down setings for 2 pull resistors, R0 and R1. Valid arguments
346              are described as below:
347              0: (R1, R0) = (0, 0) which means R1 disabled and R0 disabled.
348              1: (R1, R0) = (0, 1) which means R1 disabled and R0 enabled.
349              2: (R1, R0) = (1, 0) which means R1 enabled and R0 disabled.
350              3: (R1, R0) = (1, 1) which means R1 enabled and R0 enabled.
351            $ref: /schemas/types.yaml#/definitions/uint32
352            enum: [0, 1, 2, 3]
353
354        required:
355          - pins
356
357additionalProperties: false
358
359examples:
360  - |
361    #include <dt-bindings/interrupt-controller/irq.h>
362    #include <dt-bindings/interrupt-controller/arm-gic.h>
363    #include <dt-bindings/pinctrl/mt65xx.h>
364
365    soc {
366      #address-cells = <2>;
367      #size-cells = <2>;
368      pio: pinctrl@1001f000 {
369        compatible = "mediatek,mt7986a-pinctrl";
370        reg = <0 0x1001f000 0 0x1000>,
371              <0 0x11c30000 0 0x1000>,
372              <0 0x11c40000 0 0x1000>,
373              <0 0x11e20000 0 0x1000>,
374              <0 0x11e30000 0 0x1000>,
375              <0 0x11f00000 0 0x1000>,
376              <0 0x11f10000 0 0x1000>,
377              <0 0x1000b000 0 0x1000>;
378        reg-names = "gpio", "iocfg_rt", "iocfg_rb", "iocfg_lt",
379                    "iocfg_lb", "iocfg_tr", "iocfg_tl", "eint";
380        gpio-controller;
381        #gpio-cells = <2>;
382        gpio-ranges = <&pio 0 0 100>;
383        interrupt-controller;
384        interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>;
385        interrupt-parent = <&gic>;
386        #interrupt-cells = <2>;
387
388        pcie_pins: pcie-pins {
389          mux {
390            function = "pcie";
391            groups = "pcie_clk", "pcie_wake", "pcie_pereset";
392          };
393        };
394
395        pwm_pins: pwm-pins {
396          mux {
397            function = "pwm";
398            groups = "pwm0", "pwm1_0";
399          };
400        };
401
402        spi0_pins: spi0-pins {
403          mux {
404            function = "spi";
405            groups = "spi0", "spi0_wp_hold";
406          };
407        };
408
409        uart1_pins: uart1-pins {
410          mux {
411            function = "uart";
412            groups = "uart1";
413          };
414        };
415
416        uart1_3_pins: uart1-3-pins {
417          mux {
418            function = "uart";
419            groups = "uart1_3_rx_tx", "uart1_3_cts_rts";
420          };
421        };
422
423        uart2_pins: uart2-pins {
424          mux {
425            function = "uart";
426            groups = "uart2";
427          };
428        };
429
430        mmc0_pins_default: mmc0-pins {
431          mux {
432            function = "emmc";
433            groups = "emmc_51";
434          };
435          conf-cmd-dat {
436            pins = "EMMC_DATA_0", "EMMC_DATA_1", "EMMC_DATA_2",
437                   "EMMC_DATA_3", "EMMC_DATA_4", "EMMC_DATA_5",
438                   "EMMC_DATA_6", "EMMC_DATA_7", "EMMC_CMD";
439            input-enable;
440            drive-strength = <4>;
441            bias-pull-up = <MTK_PUPD_SET_R1R0_01>; /* pull-up 10K */
442          };
443          conf-clk {
444            pins = "EMMC_CK";
445            drive-strength = <6>;
446            bias-pull-down = <MTK_PUPD_SET_R1R0_10>; /* pull-down 50K */
447          };
448          conf-ds {
449            pins = "EMMC_DSL";
450            bias-pull-down = <MTK_PUPD_SET_R1R0_10>; /* pull-down 50K */
451          };
452          conf-rst {
453            pins = "EMMC_RSTB";
454            drive-strength = <4>;
455            bias-pull-up = <MTK_PUPD_SET_R1R0_01>; /* pull-up 10K */
456          };
457        };
458
459      };
460    };
461