1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/pinctrl/mediatek,mt7622-pinctrl.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: MediaTek MT7622 Pin Controller 8 9maintainers: 10 - Sean Wang <sean.wang@kernel.org> 11 12description: 13 The MediaTek's MT7622 Pin controller is used to control SoC pins. 14 15properties: 16 compatible: 17 enum: 18 - mediatek,mt7622-pinctrl 19 - mediatek,mt7629-pinctrl 20 21 reg: 22 maxItems: 1 23 24 reg-names: 25 items: 26 - const: eint 27 28 gpio-controller: true 29 30 "#gpio-cells": 31 const: 2 32 description: 33 Number of cells in GPIO specifier. Since the generic GPIO binding is used, 34 the amount of cells must be specified as 2. See the below mentioned gpio 35 binding representation for description of particular cells. 36 37 interrupt-controller: true 38 39 interrupts: 40 maxItems: 1 41 42 "#interrupt-cells": 43 const: 2 44 45allOf: 46 - $ref: pinctrl.yaml# 47 48required: 49 - compatible 50 - reg 51 - gpio-controller 52 - "#gpio-cells" 53 54if: 55 required: 56 - interrupt-controller 57then: 58 required: 59 - reg-names 60 - interrupts 61 - "#interrupt-cells" 62 63patternProperties: 64 '-pins(-[a-z]+)?$': 65 type: object 66 additionalProperties: false 67 patternProperties: 68 '^mux(-|$)': 69 type: object 70 additionalProperties: false 71 description: 72 pinmux configuration nodes. 73 $ref: /schemas/pinctrl/pinmux-node.yaml 74 properties: 75 function: 76 description: 77 A string containing the name of the function to mux to the group. 78 enum: [emmc, eth, i2c, i2s, ir, led, flash, pcie, pmic, pwm, sd, 79 spi, tdm, uart, watchdog, wifi] 80 81 groups: 82 description: 83 An array of strings. Each string contains the name of a group. 84 85 drive-strength: 86 enum: [4, 8, 12, 16] 87 88 required: 89 - groups 90 - function 91 92 allOf: 93 - if: 94 properties: 95 function: 96 const: emmc 97 then: 98 properties: 99 groups: 100 items: 101 enum: [emmc, emmc_rst] 102 - if: 103 properties: 104 function: 105 const: eth 106 then: 107 properties: 108 groups: 109 items: 110 enum: [esw, esw_p0_p1, esw_p2_p3_p4, rgmii_via_esw, 111 rgmii_via_gmac1, rgmii_via_gmac2, mdc_mdio] 112 - if: 113 properties: 114 function: 115 const: i2c 116 then: 117 properties: 118 groups: 119 enum: [i2c0, i2c_0, i2c_1, i2c1_0, i2c1_1, i2c1_2, i2c2_0, 120 i2c2_1, i2c2_2] 121 - if: 122 properties: 123 function: 124 const: i2s 125 then: 126 properties: 127 groups: 128 items: 129 enum: [i2s_in_mclk_bclk_ws, i2s1_in_data, i2s2_in_data, 130 i2s3_in_data, i2s4_in_data, i2s_out_mclk_bclk_ws, 131 i2s1_out_data, i2s2_out_data, i2s3_out_data, 132 i2s4_out_data] 133 - if: 134 properties: 135 function: 136 const: ir 137 then: 138 properties: 139 groups: 140 enum: [ir_0_tx, ir_1_tx, ir_2_tx, ir_0_rx, ir_1_rx, ir_2_rx] 141 - if: 142 properties: 143 function: 144 const: led 145 then: 146 properties: 147 groups: 148 enum: [ephy_leds, ephy0_led, ephy1_led, ephy2_led, ephy3_led, 149 ephy4_led, wled, wf2g_led, wf5g_led] 150 - if: 151 properties: 152 function: 153 const: flash 154 then: 155 properties: 156 groups: 157 enum: [par_nand, snfi, spi_nor] 158 - if: 159 properties: 160 function: 161 const: pcie 162 then: 163 properties: 164 groups: 165 items: 166 enum: [pcie0_0_waken, pcie0_1_waken, pcie1_0_waken, 167 pcie0_0_clkreq, pcie0_1_clkreq, pcie1_0_clkreq, 168 pcie0_pad_perst, pcie1_pad_perst, pcie_pereset, 169 pcie_wake, pcie_clkreq] 170 - if: 171 properties: 172 function: 173 const: pmic 174 then: 175 properties: 176 groups: 177 enum: [pmic_bus] 178 - if: 179 properties: 180 function: 181 const: pwm 182 then: 183 properties: 184 groups: 185 items: 186 enum: [pwm_ch1_0, pwm_ch1_1, pwm_ch1_2, pwm_ch2_0, pwm_ch2_1, 187 pwm_ch2_2, pwm_ch3_0, pwm_ch3_1, pwm_ch3_2, pwm_ch4_0, 188 pwm_ch4_1, pwm_ch4_2, pwm_ch4_3, pwm_ch5_0, pwm_ch5_1, 189 pwm_ch5_2, pwm_ch6_0, pwm_ch6_1, pwm_ch6_2, pwm_ch6_3, 190 pwm_ch7_0, pwm_0, pwm_1] 191 - if: 192 properties: 193 function: 194 const: sd 195 then: 196 properties: 197 groups: 198 enum: [sd_0, sd_1] 199 - if: 200 properties: 201 function: 202 const: spi 203 then: 204 properties: 205 groups: 206 enum: [spic0_0, spic0_1, spic1_0, spic1_1, spic2_0_wp_hold, 207 spic2_0, spi_0, spi_1, spi_wp, spi_hold] 208 - if: 209 properties: 210 function: 211 const: tdm 212 then: 213 properties: 214 groups: 215 enum: [tdm_0_out_mclk_bclk_ws, tdm_0_in_mclk_bclk_ws, 216 tdm_0_out_data, tdm_0_in_data, tdm_1_out_mclk_bclk_ws, 217 tdm_1_in_mclk_bclk_ws, tdm_1_out_data, tdm_1_in_data] 218 - if: 219 properties: 220 function: 221 const: uart 222 then: 223 properties: 224 groups: 225 enum: [uart0_0_tx_rx, uart1_0_tx_rx, uart1_0_rts_cts, 226 uart1_1_tx_rx, uart1_1_rts_cts, uart2_0_tx_rx, 227 uart2_0_rts_cts, uart2_1_tx_rx, uart2_1_rts_cts, 228 uart2_2_tx_rx, uart2_2_rts_cts, uart2_3_tx_rx, 229 uart3_0_tx_rx, uart3_1_tx_rx, uart3_1_rts_cts, 230 uart4_0_tx_rx, uart4_1_tx_rx, uart4_1_rts_cts, 231 uart4_2_tx_rx, uart4_2_rts_cts, uart0_txd_rxd, 232 uart1_0_txd_rxd, uart1_0_cts_rts, uart1_1_txd_rxd, 233 uart1_1_cts_rts, uart2_0_txd_rxd, uart2_0_cts_rts, 234 uart2_1_txd_rxd, uart2_1_cts_rts] 235 - if: 236 properties: 237 function: 238 const: watchdog 239 then: 240 properties: 241 groups: 242 enum: [watchdog] 243 - if: 244 properties: 245 function: 246 const: wifi 247 then: 248 properties: 249 groups: 250 enum: [wf0_2g, wf0_5g] 251 252 '^conf(-|$)': 253 type: object 254 additionalProperties: false 255 description: 256 pinconf configuration nodes. 257 $ref: /schemas/pinctrl/pincfg-node.yaml 258 259 properties: 260 groups: 261 description: 262 An array of strings. Each string contains the name of a group. 263 Valid values are the same as the pinmux node. 264 265 pins: 266 description: 267 An array of strings. Each string contains the name of a pin. 268 items: 269 enum: [GPIO_A, I2S1_IN, I2S1_OUT, I2S_BCLK, I2S_WS, I2S_MCLK, TXD0, 270 RXD0, SPI_WP, SPI_HOLD, SPI_CLK, SPI_MOSI, SPI_MISO, SPI_CS, 271 I2C_SDA, I2C_SCL, I2S2_IN, I2S3_IN, I2S4_IN, I2S2_OUT, 272 I2S3_OUT, I2S4_OUT, GPIO_B, MDC, MDIO, G2_TXD0, G2_TXD1, 273 G2_TXD2, G2_TXD3, G2_TXEN, G2_TXC, G2_RXD0, G2_RXD1, G2_RXD2, 274 G2_RXD3, G2_RXDV, G2_RXC, NCEB, NWEB, NREB, NDL4, NDL5, NDL6, 275 NDL7, NRB, NCLE, NALE, NDL0, NDL1, NDL2, NDL3, MDI_TP_P0, 276 MDI_TN_P0, MDI_RP_P0, MDI_RN_P0, MDI_TP_P1, MDI_TN_P1, 277 MDI_RP_P1, MDI_RN_P1, MDI_RP_P2, MDI_RN_P2, MDI_TP_P2, 278 MDI_TN_P2, MDI_TP_P3, MDI_TN_P3, MDI_RP_P3, MDI_RN_P3, 279 MDI_RP_P4, MDI_RN_P4, MDI_TP_P4, MDI_TN_P4, PMIC_SCL, 280 PMIC_SDA, SPIC1_CLK, SPIC1_MOSI, SPIC1_MISO, SPIC1_CS, 281 GPIO_D, WATCHDOG, RTS3_N, CTS3_N, TXD3, RXD3, PERST0_N, 282 PERST1_N, WLED_N, EPHY_LED0_N, AUXIN0, AUXIN1, AUXIN2, 283 AUXIN3, TXD4, RXD4, RTS4_N, CST4_N, PWM1, PWM2, PWM3, PWM4, 284 PWM5, PWM6, PWM7, GPIO_E, TOP_5G_CLK, TOP_5G_DATA, 285 WF0_5G_HB0, WF0_5G_HB1, WF0_5G_HB2, WF0_5G_HB3, WF0_5G_HB4, 286 WF0_5G_HB5, WF0_5G_HB6, XO_REQ, TOP_RST_N, SYS_WATCHDOG, 287 EPHY_LED0_N_JTDO, EPHY_LED1_N_JTDI, EPHY_LED2_N_JTMS, 288 EPHY_LED3_N_JTCLK, EPHY_LED4_N_JTRST_N, WF2G_LED_N, 289 WF5G_LED_N, GPIO_9, GPIO_10, GPIO_11, GPIO_12, UART1_TXD, 290 UART1_RXD, UART1_CTS, UART1_RTS, UART2_TXD, UART2_RXD, 291 UART2_CTS, UART2_RTS, SMI_MDC, SMI_MDIO, PCIE_PERESET_N, 292 PWM_0, GPIO_0, GPIO_1, GPIO_2, GPIO_3, GPIO_4, GPIO_5, 293 GPIO_6, GPIO_7, GPIO_8, UART0_TXD, UART0_RXD, TOP_2G_CLK, 294 TOP_2G_DATA, WF0_2G_HB0, WF0_2G_HB1, WF0_2G_HB2, WF0_2G_HB3, 295 WF0_2G_HB4, WF0_2G_HB5, WF0_2G_HB6] 296 297 bias-disable: true 298 299 bias-pull-up: true 300 301 bias-pull-down: true 302 303 input-enable: true 304 305 input-disable: true 306 307 output-enable: true 308 309 output-low: true 310 311 output-high: true 312 313 input-schmitt-enable: true 314 315 input-schmitt-disable: true 316 317 drive-strength: 318 enum: [4, 8, 12, 16] 319 320 slew-rate: 321 enum: [0, 1] 322 323 mediatek,tdsel: 324 description: 325 An integer describing the steps for output level shifter duty 326 cycle when asserted (high pulse width adjustment). Valid arguments 327 are from 0 to 15. 328 $ref: /schemas/types.yaml#/definitions/uint32 329 330 mediatek,rdsel: 331 description: 332 An integer describing the steps for input level shifter duty cycle 333 when asserted (high pulse width adjustment). Valid arguments are 334 from 0 to 63. 335 $ref: /schemas/types.yaml#/definitions/uint32 336 337 required: 338 - pins 339 340additionalProperties: false 341 342examples: 343 - | 344 #include <dt-bindings/interrupt-controller/irq.h> 345 #include <dt-bindings/interrupt-controller/arm-gic.h> 346 347 soc { 348 #address-cells = <2>; 349 #size-cells = <2>; 350 351 pio: pinctrl@10211000 { 352 compatible = "mediatek,mt7622-pinctrl"; 353 reg = <0 0x10211000 0 0x1000>; 354 gpio-controller; 355 #gpio-cells = <2>; 356 357 pinctrl_eth_default: eth-pins { 358 mux-mdio { 359 groups = "mdc_mdio"; 360 function = "eth"; 361 drive-strength = <12>; 362 }; 363 364 mux-gmac2 { 365 groups = "rgmii_via_gmac2"; 366 function = "eth"; 367 drive-strength = <12>; 368 }; 369 370 mux-esw { 371 groups = "esw"; 372 function = "eth"; 373 drive-strength = <8>; 374 }; 375 376 conf-mdio { 377 pins = "MDC"; 378 bias-pull-up; 379 }; 380 }; 381 }; 382 }; 383