1* Marvell Armada 370 SoC pinctrl driver for mpp
2
3Please refer to marvell,mvebu-pinctrl.txt in this directory for common binding
4part and usage.
5
6Required properties:
7- compatible: "marvell,88f6710-pinctrl"
8- reg: register specifier of MPP registers
9
10Available mpp pins/groups and functions:
11Note: brackets (x) are not part of the mpp name for marvell,function and given
12only for more detailed description in this document.
13
14name          pins     functions
15================================================================================
16mpp0          0        gpio, uart0(rxd)
17mpp1          1        gpo, uart0(txd)
18mpp2          2        gpio, i2c0(sck), uart0(txd)
19mpp3          3        gpio, i2c0(sda), uart0(rxd)
20mpp4          4        gpio, vdd(cpu-pd)
21mpp5          5        gpo, ge0(txclkout), uart1(txd), spi1(sck), audio(mclk)
22mpp6          6        gpio, ge0(txd0), sata0(prsnt), tdm(rst), audio(sdo)
23mpp7          7        gpo, ge0(txd1), tdm(dtx), audio(lrclk)
24mpp8          8        gpio, ge0(txd2), uart0(rts), tdm(drx), audio(bclk)
25mpp9          9        gpo, ge0(txd3), uart1(txd), sd0(clk), audio(spdifo)
26mpp10         10       gpio, ge0(txctl), uart0(cts), tdm(fsync), audio(sdi)
27mpp11         11       gpio, ge0(rxd0), uart1(rxd), sd0(cmd), spi0(cs1),
28                       sata1(prsnt), spi1(cs1)
29mpp12         12       gpio, ge0(rxd1), i2c1(sda), sd0(d0), spi1(cs0),
30                       audio(spdifi)
31mpp13         13       gpio, ge0(rxd2), i2c1(sck), sd0(d1), tdm(pclk),
32                       audio(rmclk)
33mpp14         14       gpio, ge0(rxd3), pcie(clkreq0), sd0(d2), spi1(mosi),
34                       spi0(cs2)
35mpp15         15       gpio, ge0(rxctl), pcie(clkreq1), sd0(d3), spi1(miso),
36                       spi0(cs3)
37mpp16         16       gpio, ge0(rxclk), uart1(rxd), tdm(int), audio(extclk)
38mpp17         17       gpo, ge(mdc)
39mpp18         18       gpio, ge(mdio)
40mpp19         19       gpio, ge0(txclk), ge1(txclkout), tdm(pclk)
41mpp20         20       gpo, ge0(txd4), ge1(txd0)
42mpp21         21       gpo, ge0(txd5), ge1(txd1), uart1(txd)
43mpp22         22       gpo, ge0(txd6), ge1(txd2), uart0(rts)
44mpp23         23       gpo, ge0(txd7), ge1(txd3), spi1(mosi)
45mpp24         24       gpio, ge0(col), ge1(txctl), spi1(cs0)
46mpp25         25       gpio, ge0(rxerr), ge1(rxd0), uart1(rxd)
47mpp26         26       gpio, ge0(crs), ge1(rxd1), spi1(miso)
48mpp27         27       gpio, ge0(rxd4), ge1(rxd2), uart0(cts)
49mpp28         28       gpio, ge0(rxd5), ge1(rxd3)
50mpp29         29       gpio, ge0(rxd6), ge1(rxctl), i2c1(sda)
51mpp30         30       gpio, ge0(rxd7), ge1(rxclk), i2c1(sck)
52mpp31         31       gpio, tclk, ge0(txerr)
53mpp32         32       gpio, spi0(cs0)
54mpp33         33       gpio, dev(bootcs), spi0(cs0)
55mpp34         34       gpo, dev(we0), spi0(mosi)
56mpp35         35       gpo, dev(oe), spi0(sck)
57mpp36         36       gpo, dev(a1), spi0(miso)
58mpp37         37       gpo, dev(a0), sata0(prsnt)
59mpp38         38       gpio, dev(ready), uart1(cts), uart0(cts)
60mpp39         39       gpo, dev(ad0), audio(spdifo)
61mpp40         40       gpio, dev(ad1), uart1(rts), uart0(rts)
62mpp41         41       gpio, dev(ad2), uart1(rxd)
63mpp42         42       gpo, dev(ad3), uart1(txd)
64mpp43         43       gpo, dev(ad4), audio(bclk)
65mpp44         44       gpo, dev(ad5), audio(mclk)
66mpp45         45       gpo, dev(ad6), audio(lrclk)
67mpp46         46       gpo, dev(ad7), audio(sdo)
68mpp47         47       gpo, dev(ad8), sd0(clk), audio(spdifo)
69mpp48         48       gpio, dev(ad9), uart0(rts), sd0(cmd), sata1(prsnt),
70                       spi0(cs1)
71mpp49         49       gpio, dev(ad10), pcie(clkreq1), sd0(d0), spi1(cs0),
72                       audio(spdifi)
73mpp50         50       gpio, dev(ad11), uart0(cts), sd0(d1), spi1(miso),
74                       audio(rmclk)
75mpp51         51       gpio, dev(ad12), i2c1(sda), sd0(d2), spi1(mosi)
76mpp52         52       gpio, dev(ad13), i2c1(sck), sd0(d3), spi1(sck)
77mpp53         53       gpio, dev(ad14), sd0(clk), tdm(pclk), spi0(cs2),
78                       pcie(clkreq1)
79mpp54         54       gpo, dev(ad15), tdm(dtx)
80mpp55         55       gpio, dev(cs1), uart1(txd), tdm(rst), sata1(prsnt),
81                       sata0(prsnt)
82mpp56         56       gpio, dev(cs2), uart1(cts), uart0(cts), spi0(cs3),
83                       pcie(clkreq0), spi1(cs1)
84mpp57         57       gpio, dev(cs3), uart1(rxd), tdm(fsync), sata0(prsnt),
85                       audio(sdo)
86mpp58         58       gpio, dev(cs0), uart1(rts), tdm(int), audio(extclk),
87                       uart0(rts)
88mpp59         59       gpo, dev(ale0), uart1(rts), uart0(rts), audio(bclk)
89mpp60         60       gpio, dev(ale1), uart1(rxd), sata0(prsnt), pcie(rstout),
90                       audio(sdi)
91mpp61         61       gpo, dev(we1), uart1(txd), audio(lrclk)
92mpp62         62       gpio, dev(a2), uart1(cts), tdm(drx), pcie(clkreq0),
93                       audio(mclk), uart0(cts)
94mpp63         63       gpio, spi0(sck), tclk
95mpp64         64       gpio, spi0(miso), spi0(cs1)
96mpp65         65       gpio, spi0(mosi), spi0(cs2)
97
98Note: According to the datasheet mpp63 is a gpo but there is at least
99one example of a gpio usage on the board D-Link DNS-327L
100