117723111SShawn Guo* Freescale MXS Pin Controller
217723111SShawn Guo
317723111SShawn GuoThe pins controlled by mxs pin controller are organized in banks, each bank
417723111SShawn Guohas 32 pins.  Each pin has 4 multiplexing functions, and generally, the 4th
517723111SShawn Guofunction is GPIO.  The configuration on the pins includes drive strength,
617723111SShawn Guovoltage and pull-up.
717723111SShawn Guo
817723111SShawn GuoRequired properties:
917723111SShawn Guo- compatible: "fsl,imx23-pinctrl" or "fsl,imx28-pinctrl"
1017723111SShawn Guo- reg: Should contain the register physical address and length for the
1117723111SShawn Guo  pin controller.
1217723111SShawn Guo
1317723111SShawn GuoPlease refer to pinctrl-bindings.txt in this directory for details of the
1417723111SShawn Guocommon pinctrl bindings used by client devices.
1517723111SShawn Guo
1617723111SShawn GuoThe node of mxs pin controller acts as a container for an arbitrary number of
1717723111SShawn Guosubnodes.  Each of these subnodes represents some desired configuration for
1817723111SShawn Guoa group of pins, and only affects those parameters that are explicitly listed.
1917723111SShawn GuoIn other words, a subnode that describes a drive strength parameter implies no
2017723111SShawn Guoinformation about pull-up. For this reason, even seemingly boolean values are
2117723111SShawn Guoactually tristates in this binding: unspecified, off, or on. Unspecified is
2217723111SShawn Guorepresented as an absent property, and off/on are represented as integer
2317723111SShawn Guovalues 0 and 1.
2417723111SShawn Guo
2517723111SShawn GuoThose subnodes under mxs pin controller node will fall into two categories.
2617723111SShawn GuoOne is to set up a group of pins for a function, both mux selection and pin
2717723111SShawn Guoconfigurations, and it's called group node in the binding document.   The other
2817723111SShawn Guoone is to adjust the pin configuration for some particular pins that need a
2917723111SShawn Guodifferent configuration than what is defined in group node.  The binding
3017723111SShawn Guodocument calls this type of node config node.
3117723111SShawn Guo
3217723111SShawn GuoOn mxs, there is no hardware pin group. The pin group in this binding only
3317723111SShawn Guomeans a group of pins put together for particular peripheral to work in
3417723111SShawn Guoparticular function, like SSP0 functioning as mmc0-8bit.  That said, the
3517723111SShawn Guogroup node should include all the pins needed for one function rather than
3617723111SShawn Guohaving these pins defined in several group nodes.  It also means each of
3717723111SShawn Guo"pinctrl-*" phandle in client device node should only have one group node
3817723111SShawn Guopointed in there, while the phandle can have multiple config node referenced
3917723111SShawn Guothere to adjust configurations for some pins in the group.
4017723111SShawn Guo
4117723111SShawn GuoRequired subnode-properties:
4217723111SShawn Guo- fsl,pinmux-ids: An integer array.  Each integer in the array specify a pin
4317723111SShawn Guo  with given mux function, with bank, pin and mux packed as below.
4417723111SShawn Guo
4517723111SShawn Guo    [15..12] : bank number
4617723111SShawn Guo    [11..4]  : pin number
4717723111SShawn Guo    [3..0]   : mux selection
4817723111SShawn Guo
4917723111SShawn Guo  This integer with mux selection packed is used as an entity by both group
5017723111SShawn Guo  and config nodes to identify a pin.  The mux selection in the integer takes
5117723111SShawn Guo  effects only on group node, and will get ignored by driver with config node,
5217723111SShawn Guo  since config node is only meant to set up pin configurations.
5317723111SShawn Guo
5417723111SShawn Guo  Valid values for these integers are listed below.
5517723111SShawn Guo
5617723111SShawn Guo- reg: Should be the index of the group nodes for same function.  This property
5717723111SShawn Guo  is required only for group nodes, and should not be present in any config
5817723111SShawn Guo  nodes.
5917723111SShawn Guo
6017723111SShawn GuoOptional subnode-properties:
6117723111SShawn Guo- fsl,drive-strength: Integer.
62ff04b401SLothar Waßmann    0: MXS_DRIVE_4mA
63ff04b401SLothar Waßmann    1: MXS_DRIVE_8mA
64ff04b401SLothar Waßmann    2: MXS_DRIVE_12mA
65ff04b401SLothar Waßmann    3: MXS_DRIVE_16mA
6617723111SShawn Guo- fsl,voltage: Integer.
67ff04b401SLothar Waßmann    0: MXS_VOLTAGE_LOW  - 1.8 V
68ff04b401SLothar Waßmann    1: MXS_VOLTAGE_HIGH - 3.3 V
6917723111SShawn Guo- fsl,pull-up: Integer.
70ff04b401SLothar Waßmann    0: MXS_PULL_DISABLE - Disable the internal pull-up
71ff04b401SLothar Waßmann    1: MXS_PULL_ENABLE  - Enable the internal pull-up
7217723111SShawn Guo
73d8880a12SAlexandre BelloniNote that when enabling the pull-up, the internal pad keeper gets disabled.
74d8880a12SAlexandre BelloniAlso, some pins doesn't have a pull up, in that case, setting the fsl,pull-up
75d8880a12SAlexandre Belloniwill only disable the internal pad keeper.
76d8880a12SAlexandre Belloni
7717723111SShawn GuoExamples:
7817723111SShawn Guo
7917723111SShawn Guopinctrl@80018000 {
8017723111SShawn Guo	#address-cells = <1>;
8117723111SShawn Guo	#size-cells = <0>;
8217723111SShawn Guo	compatible = "fsl,imx28-pinctrl";
8317723111SShawn Guo	reg = <0x80018000 2000>;
8417723111SShawn Guo
8517723111SShawn Guo	mmc0_8bit_pins_a: mmc0-8bit@0 {
8617723111SShawn Guo		reg = <0>;
8717723111SShawn Guo		fsl,pinmux-ids = <
88ff04b401SLothar Waßmann			MX28_PAD_SSP0_DATA0__SSP0_D0
89ff04b401SLothar Waßmann			MX28_PAD_SSP0_DATA1__SSP0_D1
90ff04b401SLothar Waßmann			MX28_PAD_SSP0_DATA2__SSP0_D2
91ff04b401SLothar Waßmann			MX28_PAD_SSP0_DATA3__SSP0_D3
92ff04b401SLothar Waßmann			MX28_PAD_SSP0_DATA4__SSP0_D4
93ff04b401SLothar Waßmann			MX28_PAD_SSP0_DATA5__SSP0_D5
94ff04b401SLothar Waßmann			MX28_PAD_SSP0_DATA6__SSP0_D6
95ff04b401SLothar Waßmann			MX28_PAD_SSP0_DATA7__SSP0_D7
96ff04b401SLothar Waßmann			MX28_PAD_SSP0_CMD__SSP0_CMD
97ff04b401SLothar Waßmann			MX28_PAD_SSP0_DETECT__SSP0_CARD_DETECT
98ff04b401SLothar Waßmann			MX28_PAD_SSP0_SCK__SSP0_SCK
99ff04b401SLothar Waßmann		>;
100ff04b401SLothar Waßmann		fsl,drive-strength = <MXS_DRIVE_4mA>;
101ff04b401SLothar Waßmann		fsl,voltage = <MXS_VOLTAGE_HIGH>;
102ff04b401SLothar Waßmann		fsl,pull-up = <MXS_PULL_ENABLE>;
10317723111SShawn Guo	};
10417723111SShawn Guo
10517723111SShawn Guo	mmc_cd_cfg: mmc-cd-cfg {
106ff04b401SLothar Waßmann		fsl,pinmux-ids = <MX28_PAD_SSP0_DETECT__SSP0_CARD_DETECT>;
107ff04b401SLothar Waßmann		fsl,pull-up = <MXS_PULL_DISABLE>;
10817723111SShawn Guo	};
10917723111SShawn Guo
11017723111SShawn Guo	mmc_sck_cfg: mmc-sck-cfg {
111ff04b401SLothar Waßmann		fsl,pinmux-ids = <MX28_PAD_SSP0_SCK__SSP0_SCK>;
112ff04b401SLothar Waßmann		fsl,drive-strength = <MXS_DRIVE_12mA>;
113ff04b401SLothar Waßmann		fsl,pull-up = <MXS_PULL_DISABLE>;
11417723111SShawn Guo	};
11517723111SShawn Guo};
11617723111SShawn Guo
11717723111SShawn GuoIn this example, group node mmc0-8bit defines a group of pins for mxs SSP0
11817723111SShawn Guoto function as a 8-bit mmc device, with 8mA, 3.3V and pull-up configurations
11917723111SShawn Guoapplied on all these pins.  And config nodes mmc-cd-cfg and mmc-sck-cfg are
12017723111SShawn Guoadjusting the configuration for pins card-detection and clock from what group
12117723111SShawn Guonode mmc0-8bit defines.  Only the configuration properties to be adjusted need
12217723111SShawn Guoto be listed in the config nodes.
12317723111SShawn Guo
124ff04b401SLothar WaßmannValid values for i.MX28/i.MX23 pinmux-id are defined in
125ff04b401SLothar Waßmannarch/arm/boot/dts/imx28-pinfunc.h and arch/arm/boot/dts/imx23-pinfunc.h.
126ff04b401SLothar WaßmannThe definitions for the padconfig properties can be found in
127ff04b401SLothar Waßmannarch/arm/boot/dts/mxs-pinfunc.h.
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