14f6a16bfSDong Aisheng* Freescale IMX51 IOMUX Controller 24f6a16bfSDong Aisheng 34f6a16bfSDong AishengPlease refer to fsl,imx-pinctrl.txt in this directory for common binding part 44f6a16bfSDong Aishengand usage. 54f6a16bfSDong Aisheng 64f6a16bfSDong AishengRequired properties: 74f6a16bfSDong Aisheng- compatible: "fsl,imx51-iomuxc" 84f6a16bfSDong Aisheng- fsl,pins: two integers array, represents a group of pins mux and config 94f6a16bfSDong Aisheng setting. The format is fsl,pins = <PIN_FUNC_ID CONFIG>, PIN_FUNC_ID is a 104f6a16bfSDong Aisheng pin working on a specific function, CONFIG is the pad setting value like 114f6a16bfSDong Aisheng pull-up for this pin. Please refer to imx51 datasheet for the valid pad 124f6a16bfSDong Aisheng config settings. 134f6a16bfSDong Aisheng 144f6a16bfSDong AishengCONFIG bits definition: 154f6a16bfSDong AishengPAD_CTL_HVE (1 << 13) 164f6a16bfSDong AishengPAD_CTL_HYS (1 << 8) 174f6a16bfSDong AishengPAD_CTL_PKE (1 << 7) 184f6a16bfSDong AishengPAD_CTL_PUE (1 << 6) 194f6a16bfSDong AishengPAD_CTL_PUS_100K_DOWN (0 << 4) 204f6a16bfSDong AishengPAD_CTL_PUS_47K_UP (1 << 4) 214f6a16bfSDong AishengPAD_CTL_PUS_100K_UP (2 << 4) 224f6a16bfSDong AishengPAD_CTL_PUS_22K_UP (3 << 4) 234f6a16bfSDong AishengPAD_CTL_ODE (1 << 3) 244f6a16bfSDong AishengPAD_CTL_DSE_LOW (0 << 1) 254f6a16bfSDong AishengPAD_CTL_DSE_MED (1 << 1) 264f6a16bfSDong AishengPAD_CTL_DSE_HIGH (2 << 1) 274f6a16bfSDong AishengPAD_CTL_DSE_MAX (3 << 1) 284f6a16bfSDong AishengPAD_CTL_SRE_FAST (1 << 0) 294f6a16bfSDong AishengPAD_CTL_SRE_SLOW (0 << 0) 304f6a16bfSDong Aisheng 31e1641531SShawn GuoRefer to imx51-pinfunc.h in device tree source folder for all available 32e1641531SShawn Guoimx51 PIN_FUNC_ID. 33