1# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/pinctrl/brcm,ns-pinmux.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Broadcom Northstar pins mux controller
8
9maintainers:
10  - Rafał Miłecki <rafal@milecki.pl>
11
12description:
13  Some of Northstar SoCs's pins can be used for various purposes thanks to the
14  mux controller. This binding allows describing mux controller and listing
15  available functions. They can be referenced later by other bindings to let
16  system configure controller correctly.
17
18  A list of pins varies across chipsets so few bindings are available.
19
20properties:
21  compatible:
22    enum:
23      - brcm,bcm4708-pinmux
24      - brcm,bcm4709-pinmux
25      - brcm,bcm53012-pinmux
26
27  reg:
28    maxItems: 1
29
30  reg-names:
31    const: cru_gpio_control
32
33patternProperties:
34  '-pins$':
35    type: object
36    description: pin node
37    $ref: pinmux-node.yaml#
38
39    properties:
40      function:
41        enum: [ spi, i2c, pwm, uart1, mdio, uart2, sdio ]
42      groups:
43        minItems: 1
44        maxItems: 4
45        items:
46          enum: [ spi_grp, i2c_grp, pwm0_grp, pwm1_grp, pwm2_grp, pwm3_grp,
47                  uart1_grp, mdio_grp, uart2_grp, sdio_pwr_grp, sdio_1p8v_grp ]
48
49    required:
50      - function
51      - groups
52
53    additionalProperties: false
54
55allOf:
56  - if:
57      properties:
58        compatible:
59          contains:
60            const: brcm,bcm4708-pinmux
61    then:
62      patternProperties:
63        '-pins$':
64          properties:
65            function:
66              enum: [ spi, i2c, pwm, uart1 ]
67            groups:
68              items:
69                enum: [ spi_grp, i2c_grp, pwm0_grp, pwm1_grp, pwm2_grp, pwm3_grp,
70                        uart1_grp ]
71
72required:
73  - reg
74  - reg-names
75
76additionalProperties: false
77
78examples:
79  - |
80    pin-controller@1800c1c0 {
81        compatible = "brcm,bcm4708-pinmux";
82        reg = <0x1800c1c0 0x24>;
83        reg-names = "cru_gpio_control";
84
85        spi-pins {
86            function = "spi";
87            groups = "spi_grp";
88        };
89    };
90