1bb37baeaSYendapally Reddy Dhananjaya ReddyBroadcom Northstar plus (NSP) GPIO/PINCONF Controller 2bb37baeaSYendapally Reddy Dhananjaya Reddy 3bb37baeaSYendapally Reddy Dhananjaya ReddyRequired properties: 4bb37baeaSYendapally Reddy Dhananjaya Reddy- compatible: 5bb37baeaSYendapally Reddy Dhananjaya Reddy Must be "brcm,nsp-gpio-a" 6bb37baeaSYendapally Reddy Dhananjaya Reddy 7bb37baeaSYendapally Reddy Dhananjaya Reddy- reg: 8bb37baeaSYendapally Reddy Dhananjaya Reddy Should contain the register physical address and length for each of 9bb37baeaSYendapally Reddy Dhananjaya Reddy GPIO base, IO control registers 10bb37baeaSYendapally Reddy Dhananjaya Reddy 11bb37baeaSYendapally Reddy Dhananjaya Reddy- #gpio-cells: 12bb37baeaSYendapally Reddy Dhananjaya Reddy Must be two. The first cell is the GPIO pin number (within the 13bb37baeaSYendapally Reddy Dhananjaya Reddy controller's pin space) and the second cell is used for the following: 14bb37baeaSYendapally Reddy Dhananjaya Reddy bit[0]: polarity (0 for active high and 1 for active low) 15bb37baeaSYendapally Reddy Dhananjaya Reddy 16bb37baeaSYendapally Reddy Dhananjaya Reddy- gpio-controller: 17bb37baeaSYendapally Reddy Dhananjaya Reddy Specifies that the node is a GPIO controller 18bb37baeaSYendapally Reddy Dhananjaya Reddy 19bb37baeaSYendapally Reddy Dhananjaya Reddy- ngpios: 20bb37baeaSYendapally Reddy Dhananjaya Reddy Number of gpios supported (58x25 supports 32 and 58x23 supports 24) 21bb37baeaSYendapally Reddy Dhananjaya Reddy 22bb37baeaSYendapally Reddy Dhananjaya ReddyOptional properties: 23bb37baeaSYendapally Reddy Dhananjaya Reddy- interrupts: 24bb37baeaSYendapally Reddy Dhananjaya Reddy Interrupt ID 25bb37baeaSYendapally Reddy Dhananjaya Reddy 26bb37baeaSYendapally Reddy Dhananjaya Reddy- interrupt-controller: 27bb37baeaSYendapally Reddy Dhananjaya Reddy Specifies that the node is an interrupt controller 28bb37baeaSYendapally Reddy Dhananjaya Reddy 29bb37baeaSYendapally Reddy Dhananjaya Reddy- gpio-ranges: 30bb37baeaSYendapally Reddy Dhananjaya Reddy Specifies the mapping between gpio controller and pin-controllers pins. 31bb37baeaSYendapally Reddy Dhananjaya Reddy This requires 4 fields in cells defined as - 32bb37baeaSYendapally Reddy Dhananjaya Reddy 1. Phandle of pin-controller. 33bb37baeaSYendapally Reddy Dhananjaya Reddy 2. GPIO base pin offset. 34bb37baeaSYendapally Reddy Dhananjaya Reddy 3 Pin-control base pin offset. 35bb37baeaSYendapally Reddy Dhananjaya Reddy 4. number of gpio pins which are linearly mapped from pin base. 36bb37baeaSYendapally Reddy Dhananjaya Reddy 37bb37baeaSYendapally Reddy Dhananjaya ReddySupported generic PINCONF properties in child nodes: 38bb37baeaSYendapally Reddy Dhananjaya Reddy- pins: 39bb37baeaSYendapally Reddy Dhananjaya Reddy The list of pins (within the controller's own pin space) that properties 40bb37baeaSYendapally Reddy Dhananjaya Reddy in the node apply to. Pin names are "gpio-<pin>" 41bb37baeaSYendapally Reddy Dhananjaya Reddy 42bb37baeaSYendapally Reddy Dhananjaya Reddy- bias-disable: 43bb37baeaSYendapally Reddy Dhananjaya Reddy Disable pin bias 44bb37baeaSYendapally Reddy Dhananjaya Reddy 45bb37baeaSYendapally Reddy Dhananjaya Reddy- bias-pull-up: 46bb37baeaSYendapally Reddy Dhananjaya Reddy Enable internal pull up resistor 47bb37baeaSYendapally Reddy Dhananjaya Reddy 48bb37baeaSYendapally Reddy Dhananjaya Reddy- bias-pull-down: 49bb37baeaSYendapally Reddy Dhananjaya Reddy Enable internal pull down resistor 50bb37baeaSYendapally Reddy Dhananjaya Reddy 51bb37baeaSYendapally Reddy Dhananjaya Reddy- drive-strength: 52bb37baeaSYendapally Reddy Dhananjaya Reddy Valid drive strength values include 2, 4, 6, 8, 10, 12, 14, 16 (mA) 53bb37baeaSYendapally Reddy Dhananjaya Reddy 54bb37baeaSYendapally Reddy Dhananjaya ReddyExample: 55bb37baeaSYendapally Reddy Dhananjaya Reddy 56bb37baeaSYendapally Reddy Dhananjaya Reddy gpioa: gpio@18000020 { 57bb37baeaSYendapally Reddy Dhananjaya Reddy compatible = "brcm,nsp-gpio-a"; 58bb37baeaSYendapally Reddy Dhananjaya Reddy reg = <0x18000020 0x100>, 59bb37baeaSYendapally Reddy Dhananjaya Reddy <0x1803f1c4 0x1c>; 60bb37baeaSYendapally Reddy Dhananjaya Reddy #gpio-cells = <2>; 61bb37baeaSYendapally Reddy Dhananjaya Reddy gpio-controller; 62bb37baeaSYendapally Reddy Dhananjaya Reddy ngpios = <32>; 63bb37baeaSYendapally Reddy Dhananjaya Reddy gpio-ranges = <&pinctrl 0 0 31>; 64bb37baeaSYendapally Reddy Dhananjaya Reddy interrupt-controller; 65bb37baeaSYendapally Reddy Dhananjaya Reddy interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>; 66bb37baeaSYendapally Reddy Dhananjaya Reddy 67bb37baeaSYendapally Reddy Dhananjaya Reddy /* Hog a few default settings */ 68bb37baeaSYendapally Reddy Dhananjaya Reddy pinctrl-names = "default"; 69bb37baeaSYendapally Reddy Dhananjaya Reddy pinctrl-0 = <&led>; 70bb37baeaSYendapally Reddy Dhananjaya Reddy led: led { 71bb37baeaSYendapally Reddy Dhananjaya Reddy pins = "gpio-1"; 72bb37baeaSYendapally Reddy Dhananjaya Reddy bias-pull-up; 73bb37baeaSYendapally Reddy Dhananjaya Reddy }; 74bb37baeaSYendapally Reddy Dhananjaya Reddy 75bb37baeaSYendapally Reddy Dhananjaya Reddy pwr: pwr { 76bb37baeaSYendapally Reddy Dhananjaya Reddy gpio-hog; 77bb37baeaSYendapally Reddy Dhananjaya Reddy gpios = <3 1>; 78bb37baeaSYendapally Reddy Dhananjaya Reddy output-high; 79bb37baeaSYendapally Reddy Dhananjaya Reddy }; 80bb37baeaSYendapally Reddy Dhananjaya Reddy }; 81