1# SPDX-License-Identifier: GPL-2.0-or-later
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/pinctrl/aspeed,ast2500-pinctrl.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: ASPEED AST2500 Pin Controller
8
9maintainers:
10  - Andrew Jeffery <andrew@aj.id.au>
11
12description: |+
13  The pin controller node should be the child of a syscon node with the
14  required property:
15
16  - compatible: 	Should be one of the following:
17  			"aspeed,ast2500-scu", "syscon", "simple-mfd"
18  			"aspeed,g5-scu", "syscon", "simple-mfd"
19
20  Refer to the the bindings described in
21  Documentation/devicetree/bindings/mfd/syscon.txt
22
23properties:
24  compatible:
25    enum:
26      - aspeed,ast2500-pinctrl
27      - aspeed,g5-pinctrl
28  aspeed,external-nodes:
29    minItems: 2
30    maxItems: 2
31    allOf:
32      - $ref: /schemas/types.yaml#/definitions/phandle-array
33    description: |
34      A cell of phandles to external controller nodes:
35      0: compatible with "aspeed,ast2500-gfx", "syscon"
36      1: compatible with "aspeed,ast2500-lhc", "syscon"
37
38patternProperties:
39  '^.*$':
40    if:
41      type: object
42    then:
43      patternProperties:
44        "^function|groups$":
45          allOf:
46            - $ref: "/schemas/types.yaml#/definitions/string"
47            - enum: [ "ACPI", "ADC0", "ADC1", "ADC10", "ADC11", "ADC12", "ADC13",
48              "ADC14", "ADC15", "ADC2", "ADC3", "ADC4", "ADC5", "ADC6", "ADC7",
49              "ADC8", "ADC9", "BMCINT", "DDCCLK", "DDCDAT", "ESPI", "FWSPICS1",
50              "FWSPICS2", "GPID0", "GPID2", "GPID4", "GPID6", "GPIE0", "GPIE2",
51              "GPIE4", "GPIE6", "I2C10", "I2C11", "I2C12", "I2C13", "I2C14",
52              "I2C3", "I2C4", "I2C5", "I2C6", "I2C7", "I2C8", "I2C9", "LAD0",
53              "LAD1", "LAD2", "LAD3", "LCLK", "LFRAME", "LPCHC", "LPCPD",
54              "LPCPLUS", "LPCPME", "LPCRST", "LPCSMI", "LSIRQ", "MAC1LINK",
55              "MAC2LINK", "MDIO1", "MDIO2", "NCTS1", "NCTS2", "NCTS3", "NCTS4",
56              "NDCD1", "NDCD2", "NDCD3", "NDCD4", "NDSR1", "NDSR2", "NDSR3",
57              "NDSR4", "NDTR1", "NDTR2", "NDTR3", "NDTR4", "NRI1", "NRI2",
58              "NRI3", "NRI4", "NRTS1", "NRTS2", "NRTS3", "NRTS4", "OSCCLK",
59              "PEWAKE", "PNOR", "PWM0", "PWM1", "PWM2", "PWM3", "PWM4", "PWM5",
60              "PWM6", "PWM7", "RGMII1", "RGMII2", "RMII1", "RMII2", "RXD1",
61              "RXD2", "RXD3", "RXD4", "SALT1", "SALT10", "SALT11", "SALT12",
62              "SALT13", "SALT14", "SALT2", "SALT3", "SALT4", "SALT5", "SALT6",
63              "SALT7", "SALT8", "SALT9", "SCL1", "SCL2", "SD1", "SD2", "SDA1",
64              "SDA2", "SGPS1", "SGPS2", "SIOONCTRL", "SIOPBI", "SIOPBO",
65              "SIOPWREQ", "SIOPWRGD", "SIOS3", "SIOS5", "SIOSCI", "SPI1",
66              "SPI1CS1", "SPI1DEBUG", "SPI1PASSTHRU", "SPI2CK", "SPI2CS0",
67              "SPI2CS1", "SPI2MISO", "SPI2MOSI", "TIMER3", "TIMER4", "TIMER5",
68              "TIMER6", "TIMER7", "TIMER8", "TXD1", "TXD2", "TXD3", "TXD4",
69              "UART6", "USB11BHID", "USB2AD", "USB2AH", "USB2BD", "USB2BH",
70              "USBCKI", "VGABIOSROM", "VGAHS", "VGAVS", "VPI24", "VPO",
71              "WDTRST1", "WDTRST2", ]
72
73required:
74  - compatible
75  - aspeed,external-nodes
76
77examples:
78  - |
79    apb {
80        compatible = "simple-bus";
81        #address-cells = <1>;
82        #size-cells = <1>;
83        ranges;
84
85        syscon: scu@1e6e2000 {
86            compatible = "aspeed,ast2500-scu", "syscon", "simple-mfd";
87            reg = <0x1e6e2000 0x1a8>;
88
89            pinctrl: pinctrl {
90                compatible = "aspeed,g5-pinctrl";
91                aspeed,external-nodes = <&gfx>, <&lhc>;
92
93                pinctrl_i2c3_default: i2c3_default {
94                    function = "I2C3";
95                    groups = "I2C3";
96                };
97
98                pinctrl_gpioh0_unbiased_default: gpioh0 {
99                    pins = "A18";
100                    bias-disable;
101                };
102            };
103        };
104
105        gfx: display@1e6e6000 {
106            compatible = "aspeed,ast2500-gfx", "syscon";
107            reg = <0x1e6e6000 0x1000>;
108        };
109    };
110
111    lpc: lpc@1e789000 {
112        compatible = "aspeed,ast2500-lpc", "simple-mfd";
113        reg = <0x1e789000 0x1000>;
114
115        #address-cells = <1>;
116        #size-cells = <1>;
117        ranges = <0x0 0x1e789000 0x1000>;
118
119        lpc_host: lpc-host@80 {
120            compatible = "aspeed,ast2500-lpc-host", "simple-mfd", "syscon";
121            reg = <0x80 0x1e0>;
122            reg-io-width = <4>;
123
124            #address-cells = <1>;
125            #size-cells = <1>;
126            ranges = <0x0 0x80 0x1e0>;
127
128            lhc: lhc@20 {
129                   compatible = "aspeed,ast2500-lhc";
130                   reg = <0x20 0x24 0x48 0x8>;
131            };
132        };
133    };
134