1# SPDX-License-Identifier: GPL-2.0-or-later
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/pinctrl/aspeed,ast2500-pinctrl.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: ASPEED AST2500 Pin Controller
8
9maintainers:
10  - Andrew Jeffery <andrew@aj.id.au>
11
12description: |+
13  The pin controller node should be the child of a syscon node with the
14  required property:
15
16  - compatible: 	Should be one of the following:
17  			"aspeed,ast2500-scu", "syscon", "simple-mfd"
18  			"aspeed,g5-scu", "syscon", "simple-mfd"
19
20  Refer to the the bindings described in
21  Documentation/devicetree/bindings/mfd/syscon.txt
22
23properties:
24  compatible:
25    const: aspeed,ast2500-pinctrl
26  aspeed,external-nodes:
27    minItems: 2
28    maxItems: 2
29    allOf:
30      - $ref: /schemas/types.yaml#/definitions/phandle-array
31    description: |
32      A cell of phandles to external controller nodes:
33      0: compatible with "aspeed,ast2500-gfx", "syscon"
34      1: compatible with "aspeed,ast2500-lhc", "syscon"
35
36patternProperties:
37  '^.*$':
38    if:
39      type: object
40    then:
41      patternProperties:
42        "^function|groups$":
43          allOf:
44            - $ref: "/schemas/types.yaml#/definitions/string"
45            - enum: [ ACPI, ADC0, ADC1, ADC10, ADC11, ADC12, ADC13, ADC14,
46              ADC15, ADC2, ADC3, ADC4, ADC5, ADC6, ADC7, ADC8, ADC9, BMCINT,
47              DDCCLK, DDCDAT, ESPI, FWSPICS1, FWSPICS2, GPID0, GPID2, GPID4,
48              GPID6, GPIE0, GPIE2, GPIE4, GPIE6, I2C10, I2C11, I2C12, I2C13,
49              I2C14, I2C3, I2C4, I2C5, I2C6, I2C7, I2C8, I2C9, LAD0, LAD1,
50              LAD2, LAD3, LCLK, LFRAME, LPCHC, LPCPD, LPCPLUS, LPCPME, LPCRST,
51              LPCSMI, LSIRQ, MAC1LINK, MAC2LINK, MDIO1, MDIO2, NCTS1, NCTS2,
52              NCTS3, NCTS4, NDCD1, NDCD2, NDCD3, NDCD4, NDSR1, NDSR2, NDSR3,
53              NDSR4, NDTR1, NDTR2, NDTR3, NDTR4, NRI1, NRI2, NRI3, NRI4, NRTS1,
54              NRTS2, NRTS3, NRTS4, OSCCLK, PEWAKE, PNOR, PWM0, PWM1, PWM2,
55              PWM3, PWM4, PWM5, PWM6, PWM7, RGMII1, RGMII2, RMII1, RMII2, RXD1,
56              RXD2, RXD3, RXD4, SALT1, SALT10, SALT11, SALT12, SALT13, SALT14,
57              SALT2, SALT3, SALT4, SALT5, SALT6, SALT7, SALT8, SALT9, SCL1,
58              SCL2, SD1, SD2, SDA1, SDA2, SGPS1, SGPS2, SIOONCTRL, SIOPBI,
59              SIOPBO, SIOPWREQ, SIOPWRGD, SIOS3, SIOS5, SIOSCI, SPI1, SPI1CS1,
60              SPI1DEBUG, SPI1PASSTHRU, SPI2CK, SPI2CS0, SPI2CS1, SPI2MISO,
61              SPI2MOSI, TIMER3, TIMER4, TIMER5, TIMER6, TIMER7, TIMER8, TXD1,
62              TXD2, TXD3, TXD4, UART6, USB11BHID, USB2AD, USB2AH, USB2BD,
63              USB2BH, USBCKI, VGABIOSROM, VGAHS, VGAVS, VPI24, VPO, WDTRST1,
64              WDTRST2, ]
65
66required:
67  - compatible
68  - aspeed,external-nodes
69
70examples:
71  - |
72    apb {
73        compatible = "simple-bus";
74        #address-cells = <1>;
75        #size-cells = <1>;
76        ranges;
77
78        syscon: scu@1e6e2000 {
79            compatible = "aspeed,ast2500-scu", "syscon", "simple-mfd";
80            reg = <0x1e6e2000 0x1a8>;
81
82            pinctrl: pinctrl {
83                compatible = "aspeed,g5-pinctrl";
84                aspeed,external-nodes = <&gfx>, <&lhc>;
85
86                pinctrl_i2c3_default: i2c3_default {
87                    function = "I2C3";
88                    groups = "I2C3";
89                };
90
91                pinctrl_gpioh0_unbiased_default: gpioh0 {
92                    pins = "A18";
93                    bias-disable;
94                };
95            };
96        };
97
98        gfx: display@1e6e6000 {
99            compatible = "aspeed,ast2500-gfx", "syscon";
100            reg = <0x1e6e6000 0x1000>;
101        };
102    };
103
104    lpc: lpc@1e789000 {
105        compatible = "aspeed,ast2500-lpc", "simple-mfd";
106        reg = <0x1e789000 0x1000>;
107
108        #address-cells = <1>;
109        #size-cells = <1>;
110        ranges = <0x0 0x1e789000 0x1000>;
111
112        lpc_host: lpc-host@80 {
113            compatible = "aspeed,ast2500-lpc-host", "simple-mfd", "syscon";
114            reg = <0x80 0x1e0>;
115            reg-io-width = <4>;
116
117            #address-cells = <1>;
118            #size-cells = <1>;
119            ranges = <0x0 0x80 0x1e0>;
120
121            lhc: lhc@20 {
122                   compatible = "aspeed,ast2500-lhc";
123                   reg = <0x20 0x24 0x48 0x8>;
124            };
125        };
126    };
127