1# SPDX-License-Identifier: GPL-2.0-or-later 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/pinctrl/aspeed,ast2500-pinctrl.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: ASPEED AST2500 Pin Controller 8 9maintainers: 10 - Andrew Jeffery <andrew@aj.id.au> 11 12description: |+ 13 The pin controller node should be the child of a syscon node with the 14 required property: 15 16 - compatible: Should be one of the following: 17 "aspeed,ast2500-scu", "syscon", "simple-mfd" 18 "aspeed,g5-scu", "syscon", "simple-mfd" 19 20 Refer to the the bindings described in 21 Documentation/devicetree/bindings/mfd/syscon.txt 22 23properties: 24 compatible: 25 enum: [ aspeed,ast2500-pinctrl, aspeed,g5-pinctrl ] 26 aspeed,external-nodes: 27 minItems: 2 28 maxItems: 2 29 allOf: 30 - $ref: /schemas/types.yaml#/definitions/phandle-array 31 description: | 32 A cell of phandles to external controller nodes: 33 0: compatible with "aspeed,ast2500-gfx", "syscon" 34 1: compatible with "aspeed,ast2500-lhc", "syscon" 35 36patternProperties: 37 '^.*$': 38 if: 39 type: object 40 then: 41 patternProperties: 42 "^function|groups$": 43 allOf: 44 - $ref: "/schemas/types.yaml#/definitions/string" 45 - enum: [ "ACPI", "ADC0", "ADC1", "ADC10", "ADC11", "ADC12", "ADC13", 46 "ADC14", "ADC15", "ADC2", "ADC3", "ADC4", "ADC5", "ADC6", "ADC7", 47 "ADC8", "ADC9", "BMCINT", "DDCCLK", "DDCDAT", "ESPI", "FWSPICS1", 48 "FWSPICS2", "GPID0", "GPID2", "GPID4", "GPID6", "GPIE0", "GPIE2", 49 "GPIE4", "GPIE6", "I2C10", "I2C11", "I2C12", "I2C13", "I2C14", 50 "I2C3", "I2C4", "I2C5", "I2C6", "I2C7", "I2C8", "I2C9", "LAD0", 51 "LAD1", "LAD2", "LAD3", "LCLK", "LFRAME", "LPCHC", "LPCPD", 52 "LPCPLUS", "LPCPME", "LPCRST", "LPCSMI", "LSIRQ", "MAC1LINK", 53 "MAC2LINK", "MDIO1", "MDIO2", "NCTS1", "NCTS2", "NCTS3", "NCTS4", 54 "NDCD1", "NDCD2", "NDCD3", "NDCD4", "NDSR1", "NDSR2", "NDSR3", 55 "NDSR4", "NDTR1", "NDTR2", "NDTR3", "NDTR4", "NRI1", "NRI2", 56 "NRI3", "NRI4", "NRTS1", "NRTS2", "NRTS3", "NRTS4", "OSCCLK", 57 "PEWAKE", "PNOR", "PWM0", "PWM1", "PWM2", "PWM3", "PWM4", "PWM5", 58 "PWM6", "PWM7", "RGMII1", "RGMII2", "RMII1", "RMII2", "RXD1", 59 "RXD2", "RXD3", "RXD4", "SALT1", "SALT10", "SALT11", "SALT12", 60 "SALT13", "SALT14", "SALT2", "SALT3", "SALT4", "SALT5", "SALT6", 61 "SALT7", "SALT8", "SALT9", "SCL1", "SCL2", "SD1", "SD2", "SDA1", 62 "SDA2", "SGPS1", "SGPS2", "SIOONCTRL", "SIOPBI", "SIOPBO", 63 "SIOPWREQ", "SIOPWRGD", "SIOS3", "SIOS5", "SIOSCI", "SPI1", 64 "SPI1CS1", "SPI1DEBUG", "SPI1PASSTHRU", "SPI2CK", "SPI2CS0", 65 "SPI2CS1", "SPI2MISO", "SPI2MOSI", "TIMER3", "TIMER4", "TIMER5", 66 "TIMER6", "TIMER7", "TIMER8", "TXD1", "TXD2", "TXD3", "TXD4", 67 "UART6", "USB11BHID", "USB2AD", "USB2AH", "USB2BD", "USB2BH", 68 "USBCKI", "VGABIOSROM", "VGAHS", "VGAVS", "VPI24", "VPO", 69 "WDTRST1", "WDTRST2", ] 70 71required: 72 - compatible 73 - aspeed,external-nodes 74 75examples: 76 - | 77 compatible = "simple-bus"; 78 ranges; 79 80 apb { 81 compatible = "simple-bus"; 82 #address-cells = <1>; 83 #size-cells = <1>; 84 ranges; 85 86 syscon: scu@1e6e2000 { 87 compatible = "aspeed,ast2500-scu", "syscon", "simple-mfd"; 88 reg = <0x1e6e2000 0x1a8>; 89 90 pinctrl: pinctrl { 91 compatible = "aspeed,g5-pinctrl"; 92 aspeed,external-nodes = <&gfx &lhc>; 93 94 pinctrl_i2c3_default: i2c3_default { 95 function = "I2C3"; 96 groups = "I2C3"; 97 }; 98 99 pinctrl_gpioh0_unbiased_default: gpioh0 { 100 pins = "A18"; 101 bias-disable; 102 }; 103 }; 104 }; 105 106 gfx: display@1e6e6000 { 107 compatible = "aspeed,ast2500-gfx", "syscon"; 108 reg = <0x1e6e6000 0x1000>; 109 }; 110 }; 111 112 lpc: lpc@1e789000 { 113 compatible = "aspeed,ast2500-lpc", "simple-mfd"; 114 reg = <0x1e789000 0x1000>; 115 116 #address-cells = <1>; 117 #size-cells = <1>; 118 ranges = <0x0 0x1e789000 0x1000>; 119 120 lpc_host: lpc-host@80 { 121 compatible = "aspeed,ast2500-lpc-host", "simple-mfd", "syscon"; 122 reg = <0x80 0x1e0>; 123 reg-io-width = <4>; 124 125 #address-cells = <1>; 126 #size-cells = <1>; 127 ranges = <0x0 0x80 0x1e0>; 128 129 lhc: lhc@20 { 130 compatible = "aspeed,ast2500-lhc"; 131 reg = <0x20 0x24 0x48 0x8>; 132 }; 133 }; 134 }; 135