1# SPDX-License-Identifier: GPL-2.0-or-later 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/pinctrl/aspeed,ast2400-pinctrl.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: ASPEED AST2400 Pin Controller 8 9maintainers: 10 - Andrew Jeffery <andrew@aj.id.au> 11 12description: |+ 13 The pin controller node should be the child of a syscon node with the 14 required property: 15 16 - compatible: Should be one of the following: 17 "aspeed,ast2400-scu", "syscon", "simple-mfd" 18 19 Refer to the the bindings described in 20 Documentation/devicetree/bindings/mfd/syscon.txt 21 22properties: 23 compatible: 24 const: aspeed,ast2400-pinctrl 25 26patternProperties: 27 '^.*$': 28 if: 29 type: object 30 then: 31 patternProperties: 32 "^function|groups$": 33 allOf: 34 - $ref: "/schemas/types.yaml#/definitions/string" 35 - enum: [ ACPI, ADC0, ADC1, ADC10, ADC11, ADC12, ADC13, ADC14, 36 ADC15, ADC2, ADC3, ADC4, ADC5, ADC6, ADC7, ADC8, ADC9, BMCINT, 37 DDCCLK, DDCDAT, EXTRST, FLACK, FLBUSY, FLWP, GPID, GPID0, GPID2, 38 GPID4, GPID6, GPIE0, GPIE2, GPIE4, GPIE6, I2C10, I2C11, I2C12, 39 I2C13, I2C14, I2C3, I2C4, I2C5, I2C6, I2C7, I2C8, I2C9, LPCPD, 40 LPCPME, LPCRST, LPCSMI, MAC1LINK, MAC2LINK, MDIO1, MDIO2, NCTS1, 41 NCTS2, NCTS3, NCTS4, NDCD1, NDCD2, NDCD3, NDCD4, NDSR1, NDSR2, 42 NDSR3, NDSR4, NDTR1, NDTR2, NDTR3, NDTR4, NDTS4, NRI1, NRI2, 43 NRI3, NRI4, NRTS1, NRTS2, NRTS3, OSCCLK, PWM0, PWM1, PWM2, PWM3, 44 PWM4, PWM5, PWM6, PWM7, RGMII1, RGMII2, RMII1, RMII2, ROM16, 45 ROM8, ROMCS1, ROMCS2, ROMCS3, ROMCS4, RXD1, RXD2, RXD3, RXD4, 46 SALT1, SALT2, SALT3, SALT4, SD1, SD2, SGPMCK, SGPMI, SGPMLD, 47 SGPMO, SGPSCK, SGPSI0, SGPSI1, SGPSLD, SIOONCTRL, SIOPBI, SIOPBO, 48 SIOPWREQ, SIOPWRGD, SIOS3, SIOS5, SIOSCI, SPI1, SPI1DEBUG, 49 SPI1PASSTHRU, SPICS1, TIMER3, TIMER4, TIMER5, TIMER6, TIMER7, 50 TIMER8, TXD1, TXD2, TXD3, TXD4, UART6, USB11D1, USB11H2, USB2D1, 51 USB2H1, USBCKI, VGABIOS_ROM, VGAHS, VGAVS, VPI18, VPI24, VPI30, 52 VPO12, VPO24, WDTRST1, WDTRST2 ] 53 54required: 55 - compatible 56 57examples: 58 - | 59 syscon: scu@1e6e2000 { 60 compatible = "aspeed,ast2400-scu", "syscon", "simple-mfd"; 61 reg = <0x1e6e2000 0x1a8>; 62 63 pinctrl: pinctrl { 64 compatible = "aspeed,g4-pinctrl"; 65 66 pinctrl_i2c3_default: i2c3_default { 67 function = "I2C3"; 68 groups = "I2C3"; 69 }; 70 71 pinctrl_gpioh0_unbiased_default: gpioh0 { 72 pins = "A8"; 73 bias-disable; 74 }; 75 }; 76 }; 77