1# SPDX-License-Identifier: GPL-2.0
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/pinctrl/allwinner,sun4i-a10-pinctrl.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Allwinner A10 Pin Controller Device Tree Bindings
8
9maintainers:
10  - Chen-Yu Tsai <wens@csie.org>
11  - Maxime Ripard <mripard@kernel.org>
12
13properties:
14  "#gpio-cells":
15    const: 3
16    description:
17      GPIO consumers must use three arguments, first the number of the
18      bank, then the pin number inside that bank, and finally the GPIO
19      flags.
20
21  "#interrupt-cells":
22    const: 3
23    description:
24      Interrupts consumers must use three arguments, first the number
25      of the bank, then the pin number inside that bank, and finally
26      the interrupts flags.
27
28  compatible:
29    enum:
30      - allwinner,sun4i-a10-pinctrl
31      - allwinner,sun5i-a10s-pinctrl
32      - allwinner,sun5i-a13-pinctrl
33      - allwinner,sun6i-a31-pinctrl
34      - allwinner,sun6i-a31-r-pinctrl
35      - allwinner,sun6i-a31s-pinctrl
36      - allwinner,sun7i-a20-pinctrl
37      - allwinner,sun8i-a23-pinctrl
38      - allwinner,sun8i-a23-r-pinctrl
39      - allwinner,sun8i-a33-pinctrl
40      - allwinner,sun8i-a83t-pinctrl
41      - allwinner,sun8i-a83t-r-pinctrl
42      - allwinner,sun8i-h3-pinctrl
43      - allwinner,sun8i-h3-r-pinctrl
44      - allwinner,sun8i-r40-pinctrl
45      - allwinner,sun8i-v3-pinctrl
46      - allwinner,sun8i-v3s-pinctrl
47      - allwinner,sun9i-a80-pinctrl
48      - allwinner,sun9i-a80-r-pinctrl
49      - allwinner,sun50i-a64-pinctrl
50      - allwinner,sun50i-a64-r-pinctrl
51      - allwinner,sun50i-a100-pinctrl
52      - allwinner,sun50i-a100-r-pinctrl
53      - allwinner,sun50i-h5-pinctrl
54      - allwinner,sun50i-h6-pinctrl
55      - allwinner,sun50i-h6-r-pinctrl
56      - allwinner,sun50i-h616-pinctrl
57      - allwinner,sun50i-h616-r-pinctrl
58      - allwinner,suniv-f1c100s-pinctrl
59      - nextthing,gr8-pinctrl
60
61  reg:
62    maxItems: 1
63
64  interrupts:
65    minItems: 1
66    maxItems: 8
67    description:
68      One interrupt per external interrupt bank supported on the
69      controller, sorted by bank number ascending order.
70
71  clocks:
72    items:
73      - description: Bus Clock
74      - description: High Frequency Oscillator
75      - description: Low Frequency Oscillator
76
77  clock-names:
78    items:
79      - const: apb
80      - const: hosc
81      - const: losc
82
83  resets:
84    maxItems: 1
85
86  gpio-controller: true
87  interrupt-controller: true
88  gpio-line-names: true
89
90  input-debounce:
91    description:
92      Debouncing periods in microseconds, one period per interrupt
93      bank found in the controller
94    $ref: /schemas/types.yaml#/definitions/uint32-array
95    minItems: 1
96    maxItems: 8
97
98patternProperties:
99  # It's pretty scary, but the basic idea is that:
100  #   - One node name can start with either s- or r- for PRCM nodes,
101  #   - Then, the name itself can be any repetition of <string>- (to
102  #     accomodate with nodes like uart4-rts-cts-pins), where each
103  #     string can be either starting with 'p' but in a string longer
104  #     than 3, or something that doesn't start with 'p',
105  #   - Then, the bank name is optional and will be between pa and pg,
106  #     pl or pm. Some pins groups that have several options will have
107  #     the pin numbers then,
108  #   - Finally, the name will end with either -pin or pins.
109
110  "^([rs]-)?(([a-z0-9]{3,}|[a-oq-z][a-z0-9]*?)?-)+?(p[a-ilm][0-9]*?-)??pins?$":
111    type: object
112
113    properties:
114      pins: true
115      function: true
116      bias-disable: true
117      bias-pull-up: true
118      bias-pull-down: true
119
120      drive-strength:
121        $ref: /schemas/types.yaml#/definitions/uint32
122        enum: [10, 20, 30, 40]
123
124    required:
125      - pins
126      - function
127
128    additionalProperties: false
129
130  "^vcc-p[a-ilm]-supply$":
131    description:
132      Power supplies for pin banks.
133
134required:
135  - "#gpio-cells"
136  - compatible
137  - reg
138  - clocks
139  - clock-names
140  - gpio-controller
141
142allOf:
143  # FIXME: We should have the pin bank supplies here, but not a lot of
144  # boards are defining it at the moment so it would generate a lot of
145  # warnings.
146
147  - $ref: "pinctrl.yaml#"
148  - if:
149      not:
150        properties:
151          compatible:
152            enum:
153              - allwinner,sun50i-h616-r-pinctrl
154
155    then:
156      required:
157        - "#interrupt-cells"
158        - interrupts
159        - interrupt-controller
160
161  - if:
162      properties:
163        compatible:
164          enum:
165            - allwinner,sun50i-h616-pinctrl
166
167    then:
168      properties:
169        interrupts:
170          minItems: 8
171
172  - if:
173      properties:
174        compatible:
175          enum:
176            - allwinner,sun50i-a100-pinctrl
177
178    then:
179      properties:
180        interrupts:
181          minItems: 7
182          maxItems: 7
183
184  - if:
185      properties:
186        compatible:
187          enum:
188            - allwinner,sun9i-a80-pinctrl
189
190    then:
191      properties:
192        interrupts:
193          minItems: 5
194          maxItems: 5
195
196  - if:
197      properties:
198        compatible:
199          enum:
200            - allwinner,sun6i-a31-pinctrl
201            - allwinner,sun6i-a31s-pinctrl
202            - allwinner,sun50i-h6-pinctrl
203
204    then:
205      properties:
206        interrupts:
207          minItems: 4
208          maxItems: 4
209
210  - if:
211      properties:
212        compatible:
213          enum:
214            - allwinner,sun8i-a23-pinctrl
215            - allwinner,sun8i-a83t-pinctrl
216            - allwinner,sun50i-a64-pinctrl
217            - allwinner,sun50i-h5-pinctrl
218            - allwinner,suniv-f1c100s-pinctrl
219
220    then:
221      properties:
222        interrupts:
223          minItems: 3
224          maxItems: 3
225
226  - if:
227      properties:
228        compatible:
229          enum:
230            - allwinner,sun6i-a31-r-pinctrl
231            - allwinner,sun8i-a33-pinctrl
232            - allwinner,sun8i-h3-pinctrl
233            - allwinner,sun8i-v3-pinctrl
234            - allwinner,sun8i-v3s-pinctrl
235            - allwinner,sun9i-a80-r-pinctrl
236            - allwinner,sun50i-h6-r-pinctrl
237
238    then:
239      properties:
240        interrupts:
241          minItems: 2
242          maxItems: 2
243
244  - if:
245      properties:
246        compatible:
247          enum:
248            - allwinner,sun4i-a10-pinctrl
249            - allwinner,sun5i-a10s-pinctrl
250            - allwinner,sun5i-a13-pinctrl
251            - allwinner,sun7i-a20-pinctrl
252            - allwinner,sun8i-a23-r-pinctrl
253            - allwinner,sun8i-a83t-r-pinctrl
254            - allwinner,sun8i-h3-r-pinctrl
255            - allwinner,sun8i-r40-pinctrl
256            - allwinner,sun50i-a64-r-pinctrl
257            - allwinner,sun50i-a100-r-pinctrl
258            - nextthing,gr8-pinctrl
259
260    then:
261      properties:
262        interrupts:
263          minItems: 1
264          maxItems: 1
265
266additionalProperties: false
267
268examples:
269  - |
270    #include <dt-bindings/clock/sun5i-ccu.h>
271
272    pio: pinctrl@1c20800 {
273        compatible = "allwinner,sun5i-a13-pinctrl";
274        reg = <0x01c20800 0x400>;
275        interrupts = <28>;
276        clocks = <&ccu CLK_APB0_PIO>, <&osc24M>, <&osc32k>;
277        clock-names = "apb", "hosc", "losc";
278        gpio-controller;
279        interrupt-controller;
280        #interrupt-cells = <3>;
281        #gpio-cells = <3>;
282
283        uart1_pe_pins: uart1-pe-pins {
284            pins = "PE10", "PE11";
285            function = "uart1";
286        };
287
288        uart1_pg_pins: uart1-pg-pins {
289            pins = "PG3", "PG4";
290            function = "uart1";
291        };
292    };
293