1# SPDX-License-Identifier: GPL-2.0 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/pinctrl/allwinner,sun4i-a10-pinctrl.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Allwinner A10 Pin Controller Device Tree Bindings 8 9maintainers: 10 - Chen-Yu Tsai <wens@csie.org> 11 - Maxime Ripard <mripard@kernel.org> 12 13properties: 14 "#gpio-cells": 15 const: 3 16 description: 17 GPIO consumers must use three arguments, first the number of the 18 bank, then the pin number inside that bank, and finally the GPIO 19 flags. 20 21 "#interrupt-cells": 22 const: 3 23 description: 24 Interrupts consumers must use three arguments, first the number 25 of the bank, then the pin number inside that bank, and finally 26 the interrupts flags. 27 28 compatible: 29 enum: 30 - allwinner,sun4i-a10-pinctrl 31 - allwinner,sun5i-a10s-pinctrl 32 - allwinner,sun5i-a13-pinctrl 33 - allwinner,sun6i-a31-pinctrl 34 - allwinner,sun6i-a31-r-pinctrl 35 - allwinner,sun6i-a31s-pinctrl 36 - allwinner,sun7i-a20-pinctrl 37 - allwinner,sun8i-a23-pinctrl 38 - allwinner,sun8i-a23-r-pinctrl 39 - allwinner,sun8i-a33-pinctrl 40 - allwinner,sun8i-a83t-pinctrl 41 - allwinner,sun8i-a83t-r-pinctrl 42 - allwinner,sun8i-h3-pinctrl 43 - allwinner,sun8i-h3-r-pinctrl 44 - allwinner,sun8i-r40-pinctrl 45 - allwinner,sun8i-v3-pinctrl 46 - allwinner,sun8i-v3s-pinctrl 47 - allwinner,sun9i-a80-pinctrl 48 - allwinner,sun9i-a80-r-pinctrl 49 - allwinner,sun50i-a64-pinctrl 50 - allwinner,sun50i-a64-r-pinctrl 51 - allwinner,sun50i-a100-pinctrl 52 - allwinner,sun50i-a100-r-pinctrl 53 - allwinner,sun50i-h5-pinctrl 54 - allwinner,sun50i-h6-pinctrl 55 - allwinner,sun50i-h6-r-pinctrl 56 - allwinner,sun50i-h616-pinctrl 57 - allwinner,sun50i-h616-r-pinctrl 58 - allwinner,suniv-f1c100s-pinctrl 59 - nextthing,gr8-pinctrl 60 61 reg: 62 maxItems: 1 63 64 interrupts: 65 minItems: 1 66 maxItems: 8 67 description: 68 One interrupt per external interrupt bank supported on the 69 controller, sorted by bank number ascending order. 70 71 clocks: 72 items: 73 - description: Bus Clock 74 - description: High Frequency Oscillator 75 - description: Low Frequency Oscillator 76 77 clock-names: 78 items: 79 - const: apb 80 - const: hosc 81 - const: losc 82 83 gpio-controller: true 84 interrupt-controller: true 85 gpio-line-names: true 86 87 input-debounce: 88 description: 89 Debouncing periods in microseconds, one period per interrupt 90 bank found in the controller 91 $ref: /schemas/types.yaml#/definitions/uint32-array 92 minItems: 1 93 maxItems: 8 94 95patternProperties: 96 # It's pretty scary, but the basic idea is that: 97 # - One node name can start with either s- or r- for PRCM nodes, 98 # - Then, the name itself can be any repetition of <string>- (to 99 # accomodate with nodes like uart4-rts-cts-pins), where each 100 # string can be either starting with 'p' but in a string longer 101 # than 3, or something that doesn't start with 'p', 102 # - Then, the bank name is optional and will be between pa and pg, 103 # pl or pm. Some pins groups that have several options will have 104 # the pin numbers then, 105 # - Finally, the name will end with either -pin or pins. 106 107 "^([rs]-)?(([a-z0-9]{3,}|[a-oq-z][a-z0-9]*?)?-)+?(p[a-ilm][0-9]*?-)??pins?$": 108 type: object 109 110 properties: 111 pins: true 112 function: true 113 bias-disable: true 114 bias-pull-up: true 115 bias-pull-down: true 116 117 drive-strength: 118 $ref: /schemas/types.yaml#/definitions/uint32 119 enum: [10, 20, 30, 40] 120 121 required: 122 - pins 123 - function 124 125 additionalProperties: false 126 127 "^vcc-p[a-hlm]-supply$": 128 description: 129 Power supplies for pin banks. 130 131required: 132 - "#gpio-cells" 133 - "#interrupt-cells" 134 - compatible 135 - reg 136 - interrupts 137 - clocks 138 - clock-names 139 - gpio-controller 140 - interrupt-controller 141 142allOf: 143 # FIXME: We should have the pin bank supplies here, but not a lot of 144 # boards are defining it at the moment so it would generate a lot of 145 # warnings. 146 147 - $ref: "pinctrl.yaml#" 148 - if: 149 properties: 150 compatible: 151 enum: 152 - allwinner,sun50i-h616-pinctrl 153 154 then: 155 properties: 156 interrupts: 157 minItems: 8 158 159 - if: 160 properties: 161 compatible: 162 enum: 163 - allwinner,sun50i-a100-pinctrl 164 165 then: 166 properties: 167 interrupts: 168 minItems: 7 169 maxItems: 7 170 171 - if: 172 properties: 173 compatible: 174 enum: 175 - allwinner,sun9i-a80-pinctrl 176 177 then: 178 properties: 179 interrupts: 180 minItems: 5 181 maxItems: 5 182 183 - if: 184 properties: 185 compatible: 186 enum: 187 - allwinner,sun6i-a31-pinctrl 188 - allwinner,sun6i-a31s-pinctrl 189 - allwinner,sun50i-h6-pinctrl 190 191 then: 192 properties: 193 interrupts: 194 minItems: 4 195 maxItems: 4 196 197 - if: 198 properties: 199 compatible: 200 enum: 201 - allwinner,sun8i-a23-pinctrl 202 - allwinner,sun8i-a83t-pinctrl 203 - allwinner,sun50i-a64-pinctrl 204 - allwinner,sun50i-h5-pinctrl 205 - allwinner,suniv-f1c100s-pinctrl 206 207 then: 208 properties: 209 interrupts: 210 minItems: 3 211 maxItems: 3 212 213 - if: 214 properties: 215 compatible: 216 enum: 217 - allwinner,sun6i-a31-r-pinctrl 218 - allwinner,sun8i-a33-pinctrl 219 - allwinner,sun8i-h3-pinctrl 220 - allwinner,sun8i-v3-pinctrl 221 - allwinner,sun8i-v3s-pinctrl 222 - allwinner,sun9i-a80-r-pinctrl 223 - allwinner,sun50i-h6-r-pinctrl 224 225 then: 226 properties: 227 interrupts: 228 minItems: 2 229 maxItems: 2 230 231 - if: 232 properties: 233 compatible: 234 enum: 235 - allwinner,sun4i-a10-pinctrl 236 - allwinner,sun5i-a10s-pinctrl 237 - allwinner,sun5i-a13-pinctrl 238 - allwinner,sun7i-a20-pinctrl 239 - allwinner,sun8i-a23-r-pinctrl 240 - allwinner,sun8i-a83t-r-pinctrl 241 - allwinner,sun8i-h3-r-pinctrl 242 - allwinner,sun8i-r40-pinctrl 243 - allwinner,sun50i-a64-r-pinctrl 244 - allwinner,sun50i-a100-r-pinctrl 245 - nextthing,gr8-pinctrl 246 247 then: 248 properties: 249 interrupts: 250 minItems: 1 251 maxItems: 1 252 253additionalProperties: false 254 255examples: 256 - | 257 #include <dt-bindings/clock/sun5i-ccu.h> 258 259 pio: pinctrl@1c20800 { 260 compatible = "allwinner,sun5i-a13-pinctrl"; 261 reg = <0x01c20800 0x400>; 262 interrupts = <28>; 263 clocks = <&ccu CLK_APB0_PIO>, <&osc24M>, <&osc32k>; 264 clock-names = "apb", "hosc", "losc"; 265 gpio-controller; 266 interrupt-controller; 267 #interrupt-cells = <3>; 268 #gpio-cells = <3>; 269 270 uart1_pe_pins: uart1-pe-pins { 271 pins = "PE10", "PE11"; 272 function = "uart1"; 273 }; 274 275 uart1_pg_pins: uart1-pg-pins { 276 pins = "PG3", "PG4"; 277 function = "uart1"; 278 }; 279 }; 280