1# SPDX-License-Identifier: GPL-2.0
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/pinctrl/allwinner,sun4i-a10-pinctrl.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Allwinner A10 Pin Controller Device Tree Bindings
8
9maintainers:
10  - Chen-Yu Tsai <wens@csie.org>
11  - Maxime Ripard <mripard@kernel.org>
12
13properties:
14  "#gpio-cells":
15    const: 3
16    description:
17      GPIO consumers must use three arguments, first the number of the
18      bank, then the pin number inside that bank, and finally the GPIO
19      flags.
20
21  "#interrupt-cells":
22    const: 3
23    description:
24      Interrupts consumers must use three arguments, first the number
25      of the bank, then the pin number inside that bank, and finally
26      the interrupts flags.
27
28  compatible:
29    enum:
30      - allwinner,sun4i-a10-pinctrl
31      - allwinner,sun5i-a10s-pinctrl
32      - allwinner,sun5i-a13-pinctrl
33      - allwinner,sun6i-a31-pinctrl
34      - allwinner,sun6i-a31-r-pinctrl
35      - allwinner,sun6i-a31s-pinctrl
36      - allwinner,sun7i-a20-pinctrl
37      - allwinner,sun8i-a23-pinctrl
38      - allwinner,sun8i-a23-r-pinctrl
39      - allwinner,sun8i-a33-pinctrl
40      - allwinner,sun8i-a83t-pinctrl
41      - allwinner,sun8i-a83t-r-pinctrl
42      - allwinner,sun8i-h3-pinctrl
43      - allwinner,sun8i-h3-r-pinctrl
44      - allwinner,sun8i-r40-pinctrl
45      - allwinner,sun8i-v3-pinctrl
46      - allwinner,sun8i-v3s-pinctrl
47      - allwinner,sun9i-a80-pinctrl
48      - allwinner,sun9i-a80-r-pinctrl
49      - allwinner,sun50i-a64-pinctrl
50      - allwinner,sun50i-a64-r-pinctrl
51      - allwinner,sun50i-a100-pinctrl
52      - allwinner,sun50i-a100-r-pinctrl
53      - allwinner,sun50i-h5-pinctrl
54      - allwinner,sun50i-h6-pinctrl
55      - allwinner,sun50i-h6-r-pinctrl
56      - allwinner,sun50i-h616-pinctrl
57      - allwinner,sun50i-h616-r-pinctrl
58      - allwinner,suniv-f1c100s-pinctrl
59      - nextthing,gr8-pinctrl
60
61  reg:
62    maxItems: 1
63
64  interrupts:
65    minItems: 1
66    maxItems: 8
67    description:
68      One interrupt per external interrupt bank supported on the
69      controller, sorted by bank number ascending order.
70
71  clocks:
72    items:
73      - description: Bus Clock
74      - description: High Frequency Oscillator
75      - description: Low Frequency Oscillator
76
77  clock-names:
78    items:
79      - const: apb
80      - const: hosc
81      - const: losc
82
83  resets:
84    maxItems: 1
85
86  gpio-controller: true
87  interrupt-controller: true
88  gpio-line-names: true
89
90  input-debounce:
91    description:
92      Debouncing periods in microseconds, one period per interrupt
93      bank found in the controller
94    $ref: /schemas/types.yaml#/definitions/uint32-array
95    minItems: 1
96    maxItems: 8
97
98patternProperties:
99  # It's pretty scary, but the basic idea is that:
100  #   - One node name can start with either s- or r- for PRCM nodes,
101  #   - Then, the name itself can be any repetition of <string>- (to
102  #     accomodate with nodes like uart4-rts-cts-pins), where each
103  #     string can be either starting with 'p' but in a string longer
104  #     than 3, or something that doesn't start with 'p',
105  #   - Then, the bank name is optional and will be between pa and pg,
106  #     pl or pm. Some pins groups that have several options will have
107  #     the pin numbers then,
108  #   - Finally, the name will end with either -pin or pins.
109
110  "^([rs]-)?(([a-z0-9]{3,}|[a-oq-z][a-z0-9]*?)?-)+?(p[a-ilm][0-9]*?-)??pins?$":
111    type: object
112
113    properties:
114      pins: true
115      function: true
116      bias-disable: true
117      bias-pull-up: true
118      bias-pull-down: true
119
120      drive-strength:
121        $ref: /schemas/types.yaml#/definitions/uint32
122        enum: [10, 20, 30, 40]
123
124    required:
125      - pins
126      - function
127
128    additionalProperties: false
129
130  "^vcc-p[a-hlm]-supply$":
131    description:
132      Power supplies for pin banks.
133
134required:
135  - "#gpio-cells"
136  - "#interrupt-cells"
137  - compatible
138  - reg
139  - interrupts
140  - clocks
141  - clock-names
142  - gpio-controller
143  - interrupt-controller
144
145allOf:
146  # FIXME: We should have the pin bank supplies here, but not a lot of
147  # boards are defining it at the moment so it would generate a lot of
148  # warnings.
149
150  - $ref: "pinctrl.yaml#"
151  - if:
152      properties:
153        compatible:
154          enum:
155            - allwinner,sun50i-h616-pinctrl
156
157    then:
158      properties:
159        interrupts:
160          minItems: 8
161
162  - if:
163      properties:
164        compatible:
165          enum:
166            - allwinner,sun50i-a100-pinctrl
167
168    then:
169      properties:
170        interrupts:
171          minItems: 7
172          maxItems: 7
173
174  - if:
175      properties:
176        compatible:
177          enum:
178            - allwinner,sun9i-a80-pinctrl
179
180    then:
181      properties:
182        interrupts:
183          minItems: 5
184          maxItems: 5
185
186  - if:
187      properties:
188        compatible:
189          enum:
190            - allwinner,sun6i-a31-pinctrl
191            - allwinner,sun6i-a31s-pinctrl
192            - allwinner,sun50i-h6-pinctrl
193
194    then:
195      properties:
196        interrupts:
197          minItems: 4
198          maxItems: 4
199
200  - if:
201      properties:
202        compatible:
203          enum:
204            - allwinner,sun8i-a23-pinctrl
205            - allwinner,sun8i-a83t-pinctrl
206            - allwinner,sun50i-a64-pinctrl
207            - allwinner,sun50i-h5-pinctrl
208            - allwinner,suniv-f1c100s-pinctrl
209
210    then:
211      properties:
212        interrupts:
213          minItems: 3
214          maxItems: 3
215
216  - if:
217      properties:
218        compatible:
219          enum:
220            - allwinner,sun6i-a31-r-pinctrl
221            - allwinner,sun8i-a33-pinctrl
222            - allwinner,sun8i-h3-pinctrl
223            - allwinner,sun8i-v3-pinctrl
224            - allwinner,sun8i-v3s-pinctrl
225            - allwinner,sun9i-a80-r-pinctrl
226            - allwinner,sun50i-h6-r-pinctrl
227
228    then:
229      properties:
230        interrupts:
231          minItems: 2
232          maxItems: 2
233
234  - if:
235      properties:
236        compatible:
237          enum:
238            - allwinner,sun4i-a10-pinctrl
239            - allwinner,sun5i-a10s-pinctrl
240            - allwinner,sun5i-a13-pinctrl
241            - allwinner,sun7i-a20-pinctrl
242            - allwinner,sun8i-a23-r-pinctrl
243            - allwinner,sun8i-a83t-r-pinctrl
244            - allwinner,sun8i-h3-r-pinctrl
245            - allwinner,sun8i-r40-pinctrl
246            - allwinner,sun50i-a64-r-pinctrl
247            - allwinner,sun50i-a100-r-pinctrl
248            - nextthing,gr8-pinctrl
249
250    then:
251      properties:
252        interrupts:
253          minItems: 1
254          maxItems: 1
255
256additionalProperties: false
257
258examples:
259  - |
260    #include <dt-bindings/clock/sun5i-ccu.h>
261
262    pio: pinctrl@1c20800 {
263        compatible = "allwinner,sun5i-a13-pinctrl";
264        reg = <0x01c20800 0x400>;
265        interrupts = <28>;
266        clocks = <&ccu CLK_APB0_PIO>, <&osc24M>, <&osc32k>;
267        clock-names = "apb", "hosc", "losc";
268        gpio-controller;
269        interrupt-controller;
270        #interrupt-cells = <3>;
271        #gpio-cells = <3>;
272
273        uart1_pe_pins: uart1-pe-pins {
274            pins = "PE10", "PE11";
275            function = "uart1";
276        };
277
278        uart1_pg_pins: uart1-pg-pins {
279            pins = "PG3", "PG4";
280            function = "uart1";
281        };
282    };
283