1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/phy/socionext,uniphier-usb3ss-phy.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Socionext UniPhier USB3 Super-Speed (SS) PHY
8
9description: |
10  This describes the devicetree bindings for PHY interfaces built into
11  USB3 controller implemented on Socionext UniPhier SoCs.
12  Although the controller includes High-Speed PHY and Super-Speed PHY,
13  this describes about Super-Speed PHY.
14
15maintainers:
16  - Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
17
18properties:
19  compatible:
20    enum:
21      - socionext,uniphier-pro4-usb3-ssphy
22      - socionext,uniphier-pro5-usb3-ssphy
23      - socionext,uniphier-pxs2-usb3-ssphy
24      - socionext,uniphier-ld20-usb3-ssphy
25      - socionext,uniphier-pxs3-usb3-ssphy
26      - socionext,uniphier-nx1-usb3-ssphy
27
28  reg:
29    maxItems: 1
30
31  "#phy-cells":
32    const: 0
33
34  clocks:
35    minItems: 2
36    maxItems: 3
37
38  clock-names:
39    oneOf:
40      - items:             # for Pro4, Pro5
41          - const: gio
42          - const: link
43      - items:             # for PXs3 with phy-ext
44          - const: link
45          - const: phy
46          - const: phy-ext
47      - items:             # for others
48          - const: link
49          - const: phy
50
51  resets:
52    maxItems: 2
53
54  reset-names:
55    oneOf:
56      - items:              # for Pro4,Pro5
57          - const: gio
58          - const: link
59      - items:              # for others
60          - const: link
61          - const: phy
62
63  vbus-supply:
64    description: A phandle to the regulator for USB VBUS
65
66required:
67  - compatible
68  - reg
69  - "#phy-cells"
70  - clocks
71  - clock-names
72  - resets
73  - reset-names
74  - vbus-supply
75
76additionalProperties: false
77
78examples:
79  - |
80    usb-glue@65b00000 {
81        compatible = "socionext,uniphier-ld20-dwc3-glue",
82                     "simple-mfd";
83        #address-cells = <1>;
84        #size-cells = <1>;
85        ranges = <0 0x65b00000 0x400>;
86
87        usb_ssphy0: ss-phy@300 {
88            compatible = "socionext,uniphier-ld20-usb3-ssphy";
89            reg = <0x300 0x10>;
90            #phy-cells = <0>;
91            clock-names = "link", "phy";
92            clocks = <&sys_clk 14>, <&sys_clk 16>;
93            reset-names = "link", "phy";
94            resets = <&sys_rst 14>, <&sys_rst 16>;
95            vbus-supply = <&usb_vbus0>;
96        };
97    };
98