1# SPDX-License-Identifier: GPL-2.0-only
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/phy/qcom,usb-hs-phy.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Qualcomm's USB HS PHY binding description
8
9maintainers:
10  - Bjorn Andersson <bjorn.andersson@linaro.org>
11
12if:
13  properties:
14    compatible:
15      contains:
16        const: qcom,usb-hs-phy-apq8064
17  then:
18    properties:
19      resets:
20        maxItems: 1
21
22      reset-names:
23        const: por
24
25  else:
26    properties:
27      resets:
28        minItems: 2
29        maxItems: 2
30
31      reset-names:
32        items:
33          - const: phy
34          - const: por
35
36properties:
37  compatible:
38    items:
39      - enum:
40          - qcom,usb-hs-phy-apq8064
41          - qcom,usb-hs-phy-msm8226
42          - qcom,usb-hs-phy-msm8916
43          - qcom,usb-hs-phy-msm8974
44      - const: qcom,usb-hs-phy
45
46  clocks:
47    minItems: 2
48    maxItems: 2
49
50  clock-names:
51    maxItems: 2
52    contains:
53      items:
54        - const: ref
55        - const: sleep
56
57  resets: true
58
59  reset-names: true
60
61  v1p8-supply: true
62
63  v3p3-supply: true
64
65  extcon: true
66
67  "#phy-cells":
68    const: 0
69
70  qcom,init-seq:
71    $ref: /schemas/types.yaml#/definitions/uint8-matrix
72    description: >
73      Sequence of ULPI address and value pairs to
74      program into the ULPI_EXT_VENDOR_SPECIFIC area.
75      This is related to Device Mode Eye Diagram test.
76    maxItems: 32 # no hard limit
77    items:
78      items:
79        - description: >
80            the address is offset from the ULPI_EXT_VENDOR_SPECIFIC address
81        - description: value
82
83required:
84  - clocks
85  - clock-names
86  - resets
87  - reset-names
88  - "#phy-cells"
89
90additionalProperties: false
91
92examples:
93  - |
94    otg: usb-controller {
95      ulpi {
96        phy {
97          compatible = "qcom,usb-hs-phy-msm8974", "qcom,usb-hs-phy";
98          #phy-cells = <0>;
99          clocks = <&clk 0>, <&clk 258>;
100          clock-names = "ref", "sleep";
101          resets = <&gcc 10>, <&otg 0>;
102          reset-names = "phy", "por";
103          v3p3-supply = <&pm8941_l24>;
104          v1p8-supply = <&pm8941_l6>;
105          extcon = <&smbb>;
106          qcom,init-seq = /bits/ 8 <0x1 0x63>;
107        };
108      };
109    };
110