1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4
5$id: http://devicetree.org/schemas/phy/qcom,hdmi-phy-qmp.yaml#
6$schema: http://devicetree.org/meta-schemas/core.yaml#
7
8title: Qualcomm Adreno/Snapdragon QMP HDMI phy
9
10maintainers:
11  - Rob Clark <robdclark@gmail.com>
12
13properties:
14  compatible:
15    enum:
16      - qcom,hdmi-phy-8996
17
18  reg:
19    maxItems: 6
20
21  reg-names:
22    items:
23      - const: hdmi_pll
24      - const: hdmi_tx_l0
25      - const: hdmi_tx_l1
26      - const: hdmi_tx_l2
27      - const: hdmi_tx_l3
28      - const: hdmi_phy
29
30  clocks:
31    maxItems: 2
32
33  clock-names:
34    items:
35      - const: iface
36      - const: ref
37
38  power-domains:
39    maxItems: 1
40
41  vcca-supply:
42    description: phandle to VCCA supply regulator
43
44  vddio-supply:
45    description: phandle to VDD I/O supply regulator
46
47  '#phy-cells':
48    const: 0
49
50required:
51  - compatible
52  - clocks
53  - clock-names
54  - reg
55  - reg-names
56  - '#phy-cells'
57
58additionalProperties: false
59
60examples:
61  - |
62    hdmi-phy@9a0600 {
63      compatible = "qcom,hdmi-phy-8996";
64      reg = <0x009a0600 0x1c4>,
65            <0x009a0a00 0x124>,
66            <0x009a0c00 0x124>,
67            <0x009a0e00 0x124>,
68            <0x009a1000 0x124>,
69            <0x009a1200 0x0c8>;
70      reg-names = "hdmi_pll",
71                  "hdmi_tx_l0",
72                  "hdmi_tx_l1",
73                  "hdmi_tx_l2",
74                  "hdmi_tx_l3",
75                  "hdmi_phy";
76
77      clocks = <&mmcc 116>,
78               <&gcc 214>;
79      clock-names = "iface",
80                    "ref";
81      #phy-cells = <0>;
82
83      vddio-supply = <&vreg_l12a_1p8>;
84      vcca-supply = <&vreg_l28a_0p925>;
85    };
86