1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/phy/qcom,sc8280xp-qmp-usb3-uni-phy.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Qualcomm QMP PHY controller (USB, SC8280XP) 8 9maintainers: 10 - Vinod Koul <vkoul@kernel.org> 11 12description: 13 The QMP PHY controller supports physical layer functionality for a number of 14 controllers on Qualcomm chipsets, such as, PCIe, UFS, and USB. 15 16properties: 17 compatible: 18 enum: 19 - qcom,sc8280xp-qmp-usb3-uni-phy 20 21 reg: 22 maxItems: 1 23 24 clocks: 25 maxItems: 5 26 27 clock-names: 28 items: 29 - const: aux 30 - const: ref_clk_src 31 - const: ref 32 - const: com_aux 33 - const: pipe 34 35 power-domains: 36 maxItems: 1 37 38 resets: 39 maxItems: 2 40 41 reset-names: 42 items: 43 - const: phy 44 - const: phy_phy 45 46 vdda-phy-supply: true 47 48 vdda-pll-supply: true 49 50 "#clock-cells": 51 const: 0 52 53 clock-output-names: 54 maxItems: 1 55 56 "#phy-cells": 57 const: 0 58 59required: 60 - compatible 61 - reg 62 - clocks 63 - clock-names 64 - power-domains 65 - resets 66 - reset-names 67 - vdda-phy-supply 68 - vdda-pll-supply 69 - "#clock-cells" 70 - clock-output-names 71 - "#phy-cells" 72 73additionalProperties: false 74 75examples: 76 - | 77 #include <dt-bindings/clock/qcom,gcc-sc8280xp.h> 78 #include <dt-bindings/clock/qcom,rpmh.h> 79 80 phy@88ef000 { 81 compatible = "qcom,sc8280xp-qmp-usb3-uni-phy"; 82 reg = <0x088ef000 0x2000>; 83 84 clocks = <&gcc GCC_USB3_MP_PHY_AUX_CLK>, 85 <&rpmhcc RPMH_CXO_CLK>, 86 <&gcc GCC_USB3_MP0_CLKREF_CLK>, 87 <&gcc GCC_USB3_MP_PHY_COM_AUX_CLK>, 88 <&gcc GCC_USB3_MP_PHY_PIPE_0_CLK>; 89 clock-names = "aux", "ref_clk_src", "ref", "com_aux", 90 "pipe"; 91 92 power-domains = <&gcc USB30_MP_GDSC>; 93 94 resets = <&gcc GCC_USB3_UNIPHY_MP0_BCR>, 95 <&gcc GCC_USB3UNIPHY_PHY_MP0_BCR>; 96 reset-names = "phy", "phy_phy"; 97 98 vdda-phy-supply = <&vreg_l3a>; 99 vdda-pll-supply = <&vreg_l5a>; 100 101 #clock-cells = <0>; 102 clock-output-names = "usb2_phy0_pipe_clk"; 103 104 #phy-cells = <0>; 105 }; 106