12f14bc38SDmitry Baryshkov# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 22f14bc38SDmitry Baryshkov%YAML 1.2 32f14bc38SDmitry Baryshkov--- 42f14bc38SDmitry Baryshkov 52f14bc38SDmitry Baryshkov$id: http://devicetree.org/schemas/phy/qcom,hdmi-phy-qmp.yaml# 62f14bc38SDmitry Baryshkov$schema: http://devicetree.org/meta-schemas/core.yaml# 72f14bc38SDmitry Baryshkov 82f14bc38SDmitry Baryshkovtitle: Qualcomm Adreno/Snapdragon QMP HDMI phy 92f14bc38SDmitry Baryshkov 102f14bc38SDmitry Baryshkovmaintainers: 112f14bc38SDmitry Baryshkov - Rob Clark <robdclark@gmail.com> 122f14bc38SDmitry Baryshkov 132f14bc38SDmitry Baryshkovproperties: 142f14bc38SDmitry Baryshkov compatible: 152f14bc38SDmitry Baryshkov enum: 162f14bc38SDmitry Baryshkov - qcom,hdmi-phy-8996 172f14bc38SDmitry Baryshkov 182f14bc38SDmitry Baryshkov reg: 192f14bc38SDmitry Baryshkov maxItems: 6 202f14bc38SDmitry Baryshkov 212f14bc38SDmitry Baryshkov reg-names: 222f14bc38SDmitry Baryshkov items: 232f14bc38SDmitry Baryshkov - const: hdmi_pll 242f14bc38SDmitry Baryshkov - const: hdmi_tx_l0 252f14bc38SDmitry Baryshkov - const: hdmi_tx_l1 262f14bc38SDmitry Baryshkov - const: hdmi_tx_l2 272f14bc38SDmitry Baryshkov - const: hdmi_tx_l3 282f14bc38SDmitry Baryshkov - const: hdmi_phy 292f14bc38SDmitry Baryshkov 302f14bc38SDmitry Baryshkov clocks: 31*e3ea01f4SDmitry Baryshkov minItems: 2 32*e3ea01f4SDmitry Baryshkov maxItems: 3 332f14bc38SDmitry Baryshkov 342f14bc38SDmitry Baryshkov clock-names: 35*e3ea01f4SDmitry Baryshkov minItems: 2 362f14bc38SDmitry Baryshkov items: 372f14bc38SDmitry Baryshkov - const: iface 382f14bc38SDmitry Baryshkov - const: ref 39*e3ea01f4SDmitry Baryshkov - const: xo 402f14bc38SDmitry Baryshkov 412f14bc38SDmitry Baryshkov power-domains: 422f14bc38SDmitry Baryshkov maxItems: 1 432f14bc38SDmitry Baryshkov 442f14bc38SDmitry Baryshkov vcca-supply: 452f14bc38SDmitry Baryshkov description: phandle to VCCA supply regulator 462f14bc38SDmitry Baryshkov 472f14bc38SDmitry Baryshkov vddio-supply: 482f14bc38SDmitry Baryshkov description: phandle to VDD I/O supply regulator 492f14bc38SDmitry Baryshkov 50*e3ea01f4SDmitry Baryshkov '#clock-cells': 51*e3ea01f4SDmitry Baryshkov const: 0 52*e3ea01f4SDmitry Baryshkov 532f14bc38SDmitry Baryshkov '#phy-cells': 542f14bc38SDmitry Baryshkov const: 0 552f14bc38SDmitry Baryshkov 562f14bc38SDmitry Baryshkovrequired: 572f14bc38SDmitry Baryshkov - compatible 582f14bc38SDmitry Baryshkov - clocks 592f14bc38SDmitry Baryshkov - clock-names 602f14bc38SDmitry Baryshkov - reg 612f14bc38SDmitry Baryshkov - reg-names 622f14bc38SDmitry Baryshkov - '#phy-cells' 632f14bc38SDmitry Baryshkov 642f14bc38SDmitry BaryshkovadditionalProperties: false 652f14bc38SDmitry Baryshkov 662f14bc38SDmitry Baryshkovexamples: 672f14bc38SDmitry Baryshkov - | 682f14bc38SDmitry Baryshkov hdmi-phy@9a0600 { 692f14bc38SDmitry Baryshkov compatible = "qcom,hdmi-phy-8996"; 702f14bc38SDmitry Baryshkov reg = <0x009a0600 0x1c4>, 712f14bc38SDmitry Baryshkov <0x009a0a00 0x124>, 722f14bc38SDmitry Baryshkov <0x009a0c00 0x124>, 732f14bc38SDmitry Baryshkov <0x009a0e00 0x124>, 742f14bc38SDmitry Baryshkov <0x009a1000 0x124>, 752f14bc38SDmitry Baryshkov <0x009a1200 0x0c8>; 762f14bc38SDmitry Baryshkov reg-names = "hdmi_pll", 772f14bc38SDmitry Baryshkov "hdmi_tx_l0", 782f14bc38SDmitry Baryshkov "hdmi_tx_l1", 792f14bc38SDmitry Baryshkov "hdmi_tx_l2", 802f14bc38SDmitry Baryshkov "hdmi_tx_l3", 812f14bc38SDmitry Baryshkov "hdmi_phy"; 822f14bc38SDmitry Baryshkov 832f14bc38SDmitry Baryshkov clocks = <&mmcc 116>, 84*e3ea01f4SDmitry Baryshkov <&gcc 214>, 85*e3ea01f4SDmitry Baryshkov <&xo_board>; 862f14bc38SDmitry Baryshkov clock-names = "iface", 87*e3ea01f4SDmitry Baryshkov "ref", 88*e3ea01f4SDmitry Baryshkov "xo"; 89*e3ea01f4SDmitry Baryshkov #clock-cells = <0>; 902f14bc38SDmitry Baryshkov #phy-cells = <0>; 912f14bc38SDmitry Baryshkov 922f14bc38SDmitry Baryshkov vddio-supply = <&vreg_l12a_1p8>; 932f14bc38SDmitry Baryshkov vcca-supply = <&vreg_l28a_0p925>; 942f14bc38SDmitry Baryshkov }; 95